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
  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [SmartGlove\SmartGlove.axf]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image SmartGlove\SmartGlove.axf</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060960: Last Updated: Sun May 12 12:33:23 2024
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        632 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. main &rArr; DMP_Init &rArr; run_self_test &rArr; mpu_run_self_test &rArr; mpu_set_dmp_state &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[82]">ADC3_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[82]">ADC3_IRQHandler</a><BR>
    15. 

  15. </UL>
    16. 

  16. <P>
    17. 

  17. <H3>
    18. 

  18. Function Pointers
    19. 

  19. </H3><UL>
    20. 

  20.  <LI><a href="#[82]">ADC3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    21. 

  21.  <LI><a href="#[1c]">ADC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    22. 

  22.  <LI><a href="#[84]">BDMA_Channel0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    23. 

  23.  <LI><a href="#[85]">BDMA_Channel1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    24. 

  24.  <LI><a href="#[86]">BDMA_Channel2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    25. 

  25.  <LI><a href="#[87]">BDMA_Channel3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    26. 

  26.  <LI><a href="#[88]">BDMA_Channel4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    27. 

  27.  <LI><a href="#[89]">BDMA_Channel5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    28. 

  28.  <LI><a href="#[8a]">BDMA_Channel6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    29. 

  29.  <LI><a href="#[8b]">BDMA_Channel7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    30. 

  30.  <LI><a href="#[4]">BusFault_Handler</a> from stm32h7xx_it.o(i.BusFault_Handler) referenced from startup_stm32h750xx.o(RESET)
    31. 

  31.  <LI><a href="#[63]">CEC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    32. 

  32.  <LI><a href="#[8c]">COMP1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    33. 

  33.  <LI><a href="#[92]">CRS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    34. 

  34.  <LI><a href="#[54]">CRYP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    35. 

  35.  <LI><a href="#[53]">DCMI_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    36. 

  36.  <LI><a href="#[73]">DFSDM1_FLT0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    37. 

  37.  <LI><a href="#[74]">DFSDM1_FLT1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    38. 

  38.  <LI><a href="#[75]">DFSDM1_FLT2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    39. 

  39.  <LI><a href="#[76]">DFSDM1_FLT3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    40. 

  40.  <LI><a href="#[15]">DMA1_Stream0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    41. 

  41.  <LI><a href="#[16]">DMA1_Stream1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    42. 

  42.  <LI><a href="#[17]">DMA1_Stream2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    43. 

  43.  <LI><a href="#[18]">DMA1_Stream3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    44. 

  44.  <LI><a href="#[19]">DMA1_Stream4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    45. 

  45.  <LI><a href="#[1a]">DMA1_Stream5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    46. 

  46.  <LI><a href="#[1b]">DMA1_Stream6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    47. 

  47.  <LI><a href="#[38]">DMA1_Stream7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    48. 

  48.  <LI><a href="#[5f]">DMA2D_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    49. 

  49.  <LI><a href="#[41]">DMA2_Stream0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    50. 

  50.  <LI><a href="#[42]">DMA2_Stream1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    51. 

  51.  <LI><a href="#[43]">DMA2_Stream2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    52. 

  52.  <LI><a href="#[44]">DMA2_Stream3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    53. 

  53.  <LI><a href="#[45]">DMA2_Stream4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    54. 

  54.  <LI><a href="#[49]">DMA2_Stream5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    55. 

  55.  <LI><a href="#[4a]">DMA2_Stream6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    56. 

  56.  <LI><a href="#[4b]">DMA2_Stream7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    57. 

  57.  <LI><a href="#[6b]">DMAMUX1_OVR_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    58. 

  58.  <LI><a href="#[83]">DMAMUX2_OVR_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    59. 

  59.  <LI><a href="#[7]">DebugMon_Handler</a> from stm32h7xx_it.o(i.DebugMon_Handler) referenced from startup_stm32h750xx.o(RESET)
    60. 

  60.  <LI><a href="#[93]">ECC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    61. 

  61.  <LI><a href="#[46]">ETH_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    62. 

  62.  <LI><a href="#[47]">ETH_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    63. 

  63.  <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    64. 

  64.  <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    65. 

  65.  <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    66. 

  66.  <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    67. 

  67.  <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    68. 

  68.  <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    69. 

  69.  <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    70. 

  70.  <LI><a href="#[1d]">FDCAN1_IT0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    71. 

  71.  <LI><a href="#[1f]">FDCAN1_IT1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    72. 

  72.  <LI><a href="#[1e]">FDCAN2_IT0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    73. 

  73.  <LI><a href="#[20]">FDCAN2_IT1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    74. 

  74.  <LI><a href="#[48]">FDCAN_CAL_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    75. 

  75.  <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    76. 

  76.  <LI><a href="#[39]">FMC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    77. 

  77.  <LI><a href="#[56]">FPU_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    78. 

  78.  <LI><a href="#[55]">HASH_RNG_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    79. 

  79.  <LI><a href="#[72]">HRTIM1_FLT_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    80. 

  80.  <LI><a href="#[6c]">HRTIM1_Master_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    81. 

  81.  <LI><a href="#[6d]">HRTIM1_TIMA_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    82. 

  82.  <LI><a href="#[6e]">HRTIM1_TIMB_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    83. 

  83.  <LI><a href="#[6f]">HRTIM1_TIMC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    84. 

  84.  <LI><a href="#[70]">HRTIM1_TIMD_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    85. 

  85.  <LI><a href="#[71]">HRTIM1_TIME_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    86. 

  86.  <LI><a href="#[81]">HSEM1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    87. 

  87.  <LI><a href="#[2]">HardFault_Handler</a> from stm32h7xx_it.o(i.HardFault_Handler) referenced from startup_stm32h750xx.o(RESET)
    88. 

  88.  <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    89. 

  89.  <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    90. 

  90.  <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    91. 

  91.  <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    92. 

  92.  <LI><a href="#[4e]">I2C3_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    93. 

  93.  <LI><a href="#[4d]">I2C3_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    94. 

  94.  <LI><a href="#[65]">I2C4_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    95. 

  95.  <LI><a href="#[64]">I2C4_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    96. 

  96.  <LI><a href="#[7e]">JPEG_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    97. 

  97.  <LI><a href="#[62]">LPTIM1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    98. 

  98.  <LI><a href="#[8d]">LPTIM2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    99. 

  99.  <LI><a href="#[8e]">LPTIM3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    100. 

  100.  <LI><a href="#[8f]">LPTIM4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    101. 

  101.  <LI><a href="#[90]">LPTIM5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    102. 

  102.  <LI><a href="#[91]">LPUART1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    103. 

  103.  <LI><a href="#[5e]">LTDC_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    104. 

  104.  <LI><a href="#[5d]">LTDC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    105. 

  105.  <LI><a href="#[7d]">MDIOS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    106. 

  106.  <LI><a href="#[7c]">MDIOS_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    107. 

  107.  <LI><a href="#[7f]">MDMA_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    108. 

  108.  <LI><a href="#[3]">MemManage_Handler</a> from stm32h7xx_it.o(i.MemManage_Handler) referenced from startup_stm32h750xx.o(RESET)
    109. 

  109.  <LI><a href="#[1]">NMI_Handler</a> from stm32h7xx_it.o(i.NMI_Handler) referenced from startup_stm32h750xx.o(RESET)
    110. 

  110.  <LI><a href="#[68]">OTG_FS_EP1_IN_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    111. 

  111.  <LI><a href="#[67]">OTG_FS_EP1_OUT_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    112. 

  112.  <LI><a href="#[6a]">OTG_FS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    113. 

  113.  <LI><a href="#[69]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    114. 

  114.  <LI><a href="#[50]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    115. 

  115.  <LI><a href="#[4f]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    116. 

  116.  <LI><a href="#[52]">OTG_HS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    117. 

  117.  <LI><a href="#[51]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    118. 

  118.  <LI><a href="#[b]">PVD_AVD_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    119. 

  119.  <LI><a href="#[8]">PendSV_Handler</a> from stm32h7xx_it.o(i.PendSV_Handler) referenced from startup_stm32h750xx.o(RESET)
    120. 

  120.  <LI><a href="#[61]">QUADSPI_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    121. 

  121.  <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    122. 

  122.  <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    123. 

  123.  <LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    124. 

  124.  <LI><a href="#[0]">Reset_Handler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    125. 

  125.  <LI><a href="#[5c]">SAI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    126. 

  126.  <LI><a href="#[60]">SAI2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    127. 

  127.  <LI><a href="#[77]">SAI3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    128. 

  128.  <LI><a href="#[94]">SAI4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    129. 

  129.  <LI><a href="#[3a]">SDMMC1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    130. 

  130.  <LI><a href="#[80]">SDMMC2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    131. 

  131.  <LI><a href="#[66]">SPDIF_RX_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    132. 

  132.  <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    133. 

  133.  <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    134. 

  134.  <LI><a href="#[3c]">SPI3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    135. 

  135.  <LI><a href="#[59]">SPI4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    136. 

  136.  <LI><a href="#[5a]">SPI5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    137. 

  137.  <LI><a href="#[5b]">SPI6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    138. 

  138.  <LI><a href="#[6]">SVC_Handler</a> from stm32h7xx_it.o(i.SVC_Handler) referenced from startup_stm32h750xx.o(RESET)
    139. 

  139.  <LI><a href="#[78]">SWPMI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    140. 

  140.  <LI><a href="#[9]">SysTick_Handler</a> from stm32h7xx_it.o(i.SysTick_Handler) referenced from startup_stm32h750xx.o(RESET)
    141. 

  141.  <LI><a href="#[97]">SystemInit</a> from system_stm32h7xx.o(i.SystemInit) referenced from startup_stm32h750xx.o(.text)
    142. 

  142.  <LI><a href="#[c]">TAMP_STAMP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    143. 

  143.  <LI><a href="#[79]">TIM15_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    144. 

  144.  <LI><a href="#[7a]">TIM16_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    145. 

  145.  <LI><a href="#[7b]">TIM17_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    146. 

  146.  <LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    147. 

  147.  <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    148. 

  148.  <LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    149. 

  149.  <LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    150. 

  150.  <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    151. 

  151.  <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    152. 

  152.  <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    153. 

  153.  <LI><a href="#[3b]">TIM5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    154. 

  154.  <LI><a href="#[3f]">TIM6_DAC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    155. 

  155.  <LI><a href="#[40]">TIM7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    156. 

  156.  <LI><a href="#[34]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    157. 

  157.  <LI><a href="#[37]">TIM8_CC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    158. 

  158.  <LI><a href="#[36]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    159. 

  159.  <LI><a href="#[35]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    160. 

  160.  <LI><a href="#[3d]">UART4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    161. 

  161.  <LI><a href="#[3e]">UART5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    162. 

  162.  <LI><a href="#[57]">UART7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    163. 

  163.  <LI><a href="#[58]">UART8_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    164. 

  164.  <LI><a href="#[2f]">USART1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    165. 

  165.  <LI><a href="#[30]">USART2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    166. 

  166.  <LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    167. 

  167.  <LI><a href="#[4c]">USART6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    168. 

  168.  <LI><a href="#[5]">UsageFault_Handler</a> from stm32h7xx_it.o(i.UsageFault_Handler) referenced from startup_stm32h750xx.o(RESET)
    169. 

  169.  <LI><a href="#[95]">WAKEUP_PIN_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    170. 

  170.  <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
    171. 

  171.  <LI><a href="#[98]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32h750xx.o(.text)
    172. 

  172.  <LI><a href="#[9a]">fputc</a> from main.o(i.fputc) referenced from printfa.o(i.__0printf)
    173. 

  173.  <LI><a href="#[99]">gyro_data_ready_cb</a> from mpu6050.o(i.gyro_data_ready_cb) referenced from mpu6050.o(i.DMP_Init)
    174. 

  174.  <LI><a href="#[96]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    175. 

  175. </UL>
    176. 

  176. <P>
    177. 

  177. <H3>
    178. 

  178. Global Symbols
    179. 

  179. </H3>
    180. 

  180. <P><STRONG><a name="[98]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    181. 

  181. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(.text)
    182. 

  182. </UL>
    183. 

  183. <P><STRONG><a name="[15f]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    184. 

  184. 

  185. <P><STRONG><a name="[9b]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    186. 

  186. <BR><BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    187. 

  187. </UL>
    188. 

  188. 

  189. <P><STRONG><a name="[ad]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    190. 

  190. <BR><BR>[Called By]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    191. 

  191. </UL>
    192. 

  192. 

  193. <P><STRONG><a name="[160]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    194. 

  194. 

  195. <P><STRONG><a name="[161]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    196. 

  196. 

  197. <P><STRONG><a name="[162]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    198. 

  198. 

  199. <P><STRONG><a name="[163]"></a>__rt_lib_shutdown_fini</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry12b.o(.ARM.Collect$$$$0000000E))
    200. 

  200. 

  201. <P><STRONG><a name="[164]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000F))
    202. 

  202. 

  203. <P><STRONG><a name="[165]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$00000011))
    204. 

  204. 

  205. <P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    206. 

  206. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    207. 

  207. </UL>
    208. 

  208. <P><STRONG><a name="[82]"></a>ADC3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    209. 

  209. <BR><BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC3_IRQHandler
    210. 

  210. </UL>
    211. 

  211. <BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC3_IRQHandler
    212. 

  212. </UL>
    213. 

  213. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    214. 

  214. </UL>
    215. 

  215. <P><STRONG><a name="[1c]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    216. 

  216. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    217. 

  217. </UL>
    218. 

  218. <P><STRONG><a name="[84]"></a>BDMA_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    219. 

  219. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    220. 

  220. </UL>
    221. 

  221. <P><STRONG><a name="[85]"></a>BDMA_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    222. 

  222. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    223. 

  223. </UL>
    224. 

  224. <P><STRONG><a name="[86]"></a>BDMA_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    225. 

  225. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    226. 

  226. </UL>
    227. 

  227. <P><STRONG><a name="[87]"></a>BDMA_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    228. 

  228. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    229. 

  229. </UL>
    230. 

  230. <P><STRONG><a name="[88]"></a>BDMA_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    231. 

  231. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    232. 

  232. </UL>
    233. 

  233. <P><STRONG><a name="[89]"></a>BDMA_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    234. 

  234. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    235. 

  235. </UL>
    236. 

  236. <P><STRONG><a name="[8a]"></a>BDMA_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    237. 

  237. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    238. 

  238. </UL>
    239. 

  239. <P><STRONG><a name="[8b]"></a>BDMA_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    240. 

  240. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    241. 

  241. </UL>
    242. 

  242. <P><STRONG><a name="[63]"></a>CEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    243. 

  243. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    244. 

  244. </UL>
    245. 

  245. <P><STRONG><a name="[8c]"></a>COMP1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    246. 

  246. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    247. 

  247. </UL>
    248. 

  248. <P><STRONG><a name="[92]"></a>CRS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    249. 

  249. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    250. 

  250. </UL>
    251. 

  251. <P><STRONG><a name="[54]"></a>CRYP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    252. 

  252. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    253. 

  253. </UL>
    254. 

  254. <P><STRONG><a name="[53]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    255. 

  255. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    256. 

  256. </UL>
    257. 

  257. <P><STRONG><a name="[73]"></a>DFSDM1_FLT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    258. 

  258. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    259. 

  259. </UL>
    260. 

  260. <P><STRONG><a name="[74]"></a>DFSDM1_FLT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    261. 

  261. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    262. 

  262. </UL>
    263. 

  263. <P><STRONG><a name="[75]"></a>DFSDM1_FLT2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    264. 

  264. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    265. 

  265. </UL>
    266. 

  266. <P><STRONG><a name="[76]"></a>DFSDM1_FLT3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    267. 

  267. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    268. 

  268. </UL>
    269. 

  269. <P><STRONG><a name="[15]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    270. 

  270. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    271. 

  271. </UL>
    272. 

  272. <P><STRONG><a name="[16]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    273. 

  273. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    274. 

  274. </UL>
    275. 

  275. <P><STRONG><a name="[17]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    276. 

  276. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    277. 

  277. </UL>
    278. 

  278. <P><STRONG><a name="[18]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    279. 

  279. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    280. 

  280. </UL>
    281. 

  281. <P><STRONG><a name="[19]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    282. 

  282. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    283. 

  283. </UL>
    284. 

  284. <P><STRONG><a name="[1a]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    285. 

  285. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    286. 

  286. </UL>
    287. 

  287. <P><STRONG><a name="[1b]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    288. 

  288. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    289. 

  289. </UL>
    290. 

  290. <P><STRONG><a name="[38]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    291. 

  291. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    292. 

  292. </UL>
    293. 

  293. <P><STRONG><a name="[5f]"></a>DMA2D_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    294. 

  294. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    295. 

  295. </UL>
    296. 

  296. <P><STRONG><a name="[41]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    297. 

  297. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    298. 

  298. </UL>
    299. 

  299. <P><STRONG><a name="[42]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    300. 

  300. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    301. 

  301. </UL>
    302. 

  302. <P><STRONG><a name="[43]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    303. 

  303. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    304. 

  304. </UL>
    305. 

  305. <P><STRONG><a name="[44]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    306. 

  306. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    307. 

  307. </UL>
    308. 

  308. <P><STRONG><a name="[45]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    309. 

  309. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    310. 

  310. </UL>
    311. 

  311. <P><STRONG><a name="[49]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    312. 

  312. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    313. 

  313. </UL>
    314. 

  314. <P><STRONG><a name="[4a]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    315. 

  315. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    316. 

  316. </UL>
    317. 

  317. <P><STRONG><a name="[4b]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    318. 

  318. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    319. 

  319. </UL>
    320. 

  320. <P><STRONG><a name="[6b]"></a>DMAMUX1_OVR_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    321. 

  321. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    322. 

  322. </UL>
    323. 

  323. <P><STRONG><a name="[83]"></a>DMAMUX2_OVR_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    324. 

  324. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    325. 

  325. </UL>
    326. 

  326. <P><STRONG><a name="[93]"></a>ECC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    327. 

  327. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    328. 

  328. </UL>
    329. 

  329. <P><STRONG><a name="[46]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    330. 

  330. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    331. 

  331. </UL>
    332. 

  332. <P><STRONG><a name="[47]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    333. 

  333. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    334. 

  334. </UL>
    335. 

  335. <P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    336. 

  336. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    337. 

  337. </UL>
    338. 

  338. <P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    339. 

  339. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    340. 

  340. </UL>
    341. 

  341. <P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    342. 

  342. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    343. 

  343. </UL>
    344. 

  344. <P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    345. 

  345. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    346. 

  346. </UL>
    347. 

  347. <P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    348. 

  348. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    349. 

  349. </UL>
    350. 

  350. <P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    351. 

  351. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    352. 

  352. </UL>
    353. 

  353. <P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    354. 

  354. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    355. 

  355. </UL>
    356. 

  356. <P><STRONG><a name="[1d]"></a>FDCAN1_IT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    357. 

  357. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    358. 

  358. </UL>
    359. 

  359. <P><STRONG><a name="[1f]"></a>FDCAN1_IT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    360. 

  360. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    361. 

  361. </UL>
    362. 

  362. <P><STRONG><a name="[1e]"></a>FDCAN2_IT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    363. 

  363. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    364. 

  364. </UL>
    365. 

  365. <P><STRONG><a name="[20]"></a>FDCAN2_IT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    366. 

  366. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    367. 

  367. </UL>
    368. 

  368. <P><STRONG><a name="[48]"></a>FDCAN_CAL_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    369. 

  369. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    370. 

  370. </UL>
    371. 

  371. <P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    372. 

  372. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    373. 

  373. </UL>
    374. 

  374. <P><STRONG><a name="[39]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    375. 

  375. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    376. 

  376. </UL>
    377. 

  377. <P><STRONG><a name="[56]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    378. 

  378. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    379. 

  379. </UL>
    380. 

  380. <P><STRONG><a name="[55]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    381. 

  381. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    382. 

  382. </UL>
    383. 

  383. <P><STRONG><a name="[72]"></a>HRTIM1_FLT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    384. 

  384. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    385. 

  385. </UL>
    386. 

  386. <P><STRONG><a name="[6c]"></a>HRTIM1_Master_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    387. 

  387. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    388. 

  388. </UL>
    389. 

  389. <P><STRONG><a name="[6d]"></a>HRTIM1_TIMA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    390. 

  390. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    391. 

  391. </UL>
    392. 

  392. <P><STRONG><a name="[6e]"></a>HRTIM1_TIMB_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    393. 

  393. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    394. 

  394. </UL>
    395. 

  395. <P><STRONG><a name="[6f]"></a>HRTIM1_TIMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    396. 

  396. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    397. 

  397. </UL>
    398. 

  398. <P><STRONG><a name="[70]"></a>HRTIM1_TIMD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    399. 

  399. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    400. 

  400. </UL>
    401. 

  401. <P><STRONG><a name="[71]"></a>HRTIM1_TIME_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    402. 

  402. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    403. 

  403. </UL>
    404. 

  404. <P><STRONG><a name="[81]"></a>HSEM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    405. 

  405. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    406. 

  406. </UL>
    407. 

  407. <P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    408. 

  408. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    409. 

  409. </UL>
    410. 

  410. <P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    411. 

  411. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    412. 

  412. </UL>
    413. 

  413. <P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    414. 

  414. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    415. 

  415. </UL>
    416. 

  416. <P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    417. 

  417. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    418. 

  418. </UL>
    419. 

  419. <P><STRONG><a name="[4e]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    420. 

  420. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    421. 

  421. </UL>
    422. 

  422. <P><STRONG><a name="[4d]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    423. 

  423. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    424. 

  424. </UL>
    425. 

  425. <P><STRONG><a name="[65]"></a>I2C4_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    426. 

  426. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    427. 

  427. </UL>
    428. 

  428. <P><STRONG><a name="[64]"></a>I2C4_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    429. 

  429. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    430. 

  430. </UL>
    431. 

  431. <P><STRONG><a name="[7e]"></a>JPEG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    432. 

  432. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    433. 

  433. </UL>
    434. 

  434. <P><STRONG><a name="[62]"></a>LPTIM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    435. 

  435. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    436. 

  436. </UL>
    437. 

  437. <P><STRONG><a name="[8d]"></a>LPTIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    438. 

  438. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    439. 

  439. </UL>
    440. 

  440. <P><STRONG><a name="[8e]"></a>LPTIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    441. 

  441. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    442. 

  442. </UL>
    443. 

  443. <P><STRONG><a name="[8f]"></a>LPTIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    444. 

  444. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    445. 

  445. </UL>
    446. 

  446. <P><STRONG><a name="[90]"></a>LPTIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    447. 

  447. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    448. 

  448. </UL>
    449. 

  449. <P><STRONG><a name="[91]"></a>LPUART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    450. 

  450. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    451. 

  451. </UL>
    452. 

  452. <P><STRONG><a name="[5e]"></a>LTDC_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    453. 

  453. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    454. 

  454. </UL>
    455. 

  455. <P><STRONG><a name="[5d]"></a>LTDC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    456. 

  456. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    457. 

  457. </UL>
    458. 

  458. <P><STRONG><a name="[7d]"></a>MDIOS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    459. 

  459. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    460. 

  460. </UL>
    461. 

  461. <P><STRONG><a name="[7c]"></a>MDIOS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    462. 

  462. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    463. 

  463. </UL>
    464. 

  464. <P><STRONG><a name="[7f]"></a>MDMA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    465. 

  465. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    466. 

  466. </UL>
    467. 

  467. <P><STRONG><a name="[68]"></a>OTG_FS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    468. 

  468. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    469. 

  469. </UL>
    470. 

  470. <P><STRONG><a name="[67]"></a>OTG_FS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    471. 

  471. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    472. 

  472. </UL>
    473. 

  473. <P><STRONG><a name="[6a]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    474. 

  474. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    475. 

  475. </UL>
    476. 

  476. <P><STRONG><a name="[69]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    477. 

  477. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    478. 

  478. </UL>
    479. 

  479. <P><STRONG><a name="[50]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    480. 

  480. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    481. 

  481. </UL>
    482. 

  482. <P><STRONG><a name="[4f]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    483. 

  483. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    484. 

  484. </UL>
    485. 

  485. <P><STRONG><a name="[52]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    486. 

  486. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    487. 

  487. </UL>
    488. 

  488. <P><STRONG><a name="[51]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    489. 

  489. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    490. 

  490. </UL>
    491. 

  491. <P><STRONG><a name="[b]"></a>PVD_AVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    492. 

  492. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    493. 

  493. </UL>
    494. 

  494. <P><STRONG><a name="[61]"></a>QUADSPI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    495. 

  495. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    496. 

  496. </UL>
    497. 

  497. <P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    498. 

  498. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    499. 

  499. </UL>
    500. 

  500. <P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    501. 

  501. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    502. 

  502. </UL>
    503. 

  503. <P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    504. 

  504. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    505. 

  505. </UL>
    506. 

  506. <P><STRONG><a name="[5c]"></a>SAI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    507. 

  507. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    508. 

  508. </UL>
    509. 

  509. <P><STRONG><a name="[60]"></a>SAI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    510. 

  510. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    511. 

  511. </UL>
    512. 

  512. <P><STRONG><a name="[77]"></a>SAI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    513. 

  513. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    514. 

  514. </UL>
    515. 

  515. <P><STRONG><a name="[94]"></a>SAI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    516. 

  516. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    517. 

  517. </UL>
    518. 

  518. <P><STRONG><a name="[3a]"></a>SDMMC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    519. 

  519. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    520. 

  520. </UL>
    521. 

  521. <P><STRONG><a name="[80]"></a>SDMMC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    522. 

  522. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    523. 

  523. </UL>
    524. 

  524. <P><STRONG><a name="[66]"></a>SPDIF_RX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    525. 

  525. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    526. 

  526. </UL>
    527. 

  527. <P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    528. 

  528. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    529. 

  529. </UL>
    530. 

  530. <P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    531. 

  531. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    532. 

  532. </UL>
    533. 

  533. <P><STRONG><a name="[3c]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    534. 

  534. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    535. 

  535. </UL>
    536. 

  536. <P><STRONG><a name="[59]"></a>SPI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    537. 

  537. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    538. 

  538. </UL>
    539. 

  539. <P><STRONG><a name="[5a]"></a>SPI5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    540. 

  540. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    541. 

  541. </UL>
    542. 

  542. <P><STRONG><a name="[5b]"></a>SPI6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    543. 

  543. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    544. 

  544. </UL>
    545. 

  545. <P><STRONG><a name="[78]"></a>SWPMI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    546. 

  546. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    547. 

  547. </UL>
    548. 

  548. <P><STRONG><a name="[c]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    549. 

  549. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    550. 

  550. </UL>
    551. 

  551. <P><STRONG><a name="[79]"></a>TIM15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    552. 

  552. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    553. 

  553. </UL>
    554. 

  554. <P><STRONG><a name="[7a]"></a>TIM16_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    555. 

  555. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    556. 

  556. </UL>
    557. 

  557. <P><STRONG><a name="[7b]"></a>TIM17_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    558. 

  558. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    559. 

  559. </UL>
    560. 

  560. <P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    561. 

  561. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    562. 

  562. </UL>
    563. 

  563. <P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    564. 

  564. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    565. 

  565. </UL>
    566. 

  566. <P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    567. 

  567. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    568. 

  568. </UL>
    569. 

  569. <P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    570. 

  570. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    571. 

  571. </UL>
    572. 

  572. <P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    573. 

  573. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    574. 

  574. </UL>
    575. 

  575. <P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    576. 

  576. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    577. 

  577. </UL>
    578. 

  578. <P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    579. 

  579. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    580. 

  580. </UL>
    581. 

  581. <P><STRONG><a name="[3b]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    582. 

  582. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    583. 

  583. </UL>
    584. 

  584. <P><STRONG><a name="[3f]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    585. 

  585. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    586. 

  586. </UL>
    587. 

  587. <P><STRONG><a name="[40]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    588. 

  588. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    589. 

  589. </UL>
    590. 

  590. <P><STRONG><a name="[34]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    591. 

  591. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    592. 

  592. </UL>
    593. 

  593. <P><STRONG><a name="[37]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    594. 

  594. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    595. 

  595. </UL>
    596. 

  596. <P><STRONG><a name="[36]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    597. 

  597. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    598. 

  598. </UL>
    599. 

  599. <P><STRONG><a name="[35]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    600. 

  600. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    601. 

  601. </UL>
    602. 

  602. <P><STRONG><a name="[3d]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    603. 

  603. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    604. 

  604. </UL>
    605. 

  605. <P><STRONG><a name="[3e]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    606. 

  606. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    607. 

  607. </UL>
    608. 

  608. <P><STRONG><a name="[57]"></a>UART7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    609. 

  609. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    610. 

  610. </UL>
    611. 

  611. <P><STRONG><a name="[58]"></a>UART8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    612. 

  612. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    613. 

  613. </UL>
    614. 

  614. <P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    615. 

  615. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    616. 

  616. </UL>
    617. 

  617. <P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    618. 

  618. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    619. 

  619. </UL>
    620. 

  620. <P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    621. 

  621. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    622. 

  622. </UL>
    623. 

  623. <P><STRONG><a name="[4c]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    624. 

  624. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    625. 

  625. </UL>
    626. 

  626. <P><STRONG><a name="[95]"></a>WAKEUP_PIN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    627. 

  627. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    628. 

  628. </UL>
    629. 

  629. <P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
    630. 

  630. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    631. 

  631. </UL>
    632. 

  632. <P><STRONG><a name="[9d]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text))
    633. 

  633. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_uldivmod
    634. 

  634. </UL>
    635. 

  635. <BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    636. 

  636. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    637. 

  637. </UL>
    638. 

  638. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    639. 

  639. <LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    640. 

  640. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ldivmod
    641. 

  641. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    642. 

  642. </UL>
    643. 

  643. 

  644. <P><STRONG><a name="[a0]"></a>__aeabi_ldivmod</STRONG> (Thumb, 98 bytes, Stack size 24 bytes, ldiv.o(.text))
    645. 

  645. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = __aeabi_ldivmod &rArr; __aeabi_uldivmod
    646. 

  646. </UL>
    647. 

  647. <BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    648. 

  648. </UL>
    649. 

  649. <BR>[Called By]<UL><LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_st_biases
    650. 

  650. </UL>
    651. 

  651. 

  652. <P><STRONG><a name="[a2]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))
    653. 

  653. <BR><BR>[Called By]<UL><LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_lp_quat
    654. 

  654. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_6x_lp_quat
    655. 

  655. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
    656. 

  656. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    657. 

  657. </UL>
    658. 

  658. 

  659. <P><STRONG><a name="[166]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    660. 

  660. 

  661. <P><STRONG><a name="[167]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    662. 

  662. 

  663. <P><STRONG><a name="[a1]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    664. 

  664. <BR><BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    665. 

  665. </UL>
    666. 

  666. 

  667. <P><STRONG><a name="[ce]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
    668. 

  668. <BR><BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    669. 

  669. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    670. 

  670. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_MspInit
    671. 

  671. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
    672. 

  672. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    673. 

  673. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    674. 

  674. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    675. 

  675. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    676. 

  676. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    677. 

  677. <LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    678. 

  678. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    679. 

  679. <LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send_packet
    680. 

  680. </UL>
    681. 

  681. 

  682. <P><STRONG><a name="[168]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    683. 

  683. 

  684. <P><STRONG><a name="[a3]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
    685. 

  685. <BR><BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    686. 

  686. </UL>
    687. 

  687. 

  688. <P><STRONG><a name="[157]"></a>memcmp</STRONG> (Thumb, 26 bytes, Stack size 12 bytes, memcmp.o(.text))
    689. 

  689. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = memcmp
    690. 

  690. </UL>
    691. 

  691. <BR>[Called By]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_load_firmware
    692. 

  692. </UL>
    693. 

  693. 

  694. <P><STRONG><a name="[169]"></a>__aeabi_uidiv</STRONG> (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
    695. 

  695. 

  696. <P><STRONG><a name="[138]"></a>__aeabi_uidivmod</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)
    697. 

  697. <BR><BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    698. 

  698. </UL>
    699. 

  699. 

  700. <P><STRONG><a name="[9f]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
    701. 

  701. <BR><BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    702. 

  702. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    703. 

  703. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
    704. 

  704. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    705. 

  705. </UL>
    706. 

  706. 

  707. <P><STRONG><a name="[16a]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)
    708. 

  708. 

  709. <P><STRONG><a name="[9e]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
    710. 

  710. <BR><BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    711. 

  711. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
    712. 

  712. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    713. 

  713. </UL>
    714. 

  714. 

  715. <P><STRONG><a name="[16b]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)
    716. 

  716. 

  717. <P><STRONG><a name="[16c]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 48 bytes, iusefp.o(.text), UNUSED)
    718. 

  718. 

  719. <P><STRONG><a name="[a4]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text), UNUSED)
    720. 

  720. <BR><BR>[Calls]<UL><LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
    721. 

  721. <LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    722. 

  722. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    723. 

  723. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    724. 

  724. </UL>
    725. 

  725. <BR>[Called By]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    726. 

  726. <LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    727. 

  727. <LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    728. 

  728. </UL>
    729. 

  729. 

  730. <P><STRONG><a name="[a8]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
    731. 

  731. <BR><BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    732. 

  732. </UL>
    733. 

  733. 

  734. <P><STRONG><a name="[a9]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
    735. 

  735. <BR><BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    736. 

  736. </UL>
    737. 

  737. 

  738. <P><STRONG><a name="[aa]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text), UNUSED)
    739. 

  739. <BR><BR>[Calls]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    740. 

  740. </UL>
    741. 

  741. <BR>[Called By]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    742. 

  742. </UL>
    743. 

  743. 

  744. <P><STRONG><a name="[ab]"></a>__aeabi_ddiv</STRONG> (Thumb, 222 bytes, Stack size 32 bytes, ddiv.o(.text), UNUSED)
    745. 

  745. <BR><BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    746. 

  746. </UL>
    747. 

  747. <BR>[Called By]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    748. 

  748. </UL>
    749. 

  749. 

  750. <P><STRONG><a name="[ac]"></a>__aeabi_d2ulz</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, dfixul.o(.text), UNUSED)
    751. 

  751. <BR><BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    752. 

  752. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    753. 

  753. </UL>
    754. 

  754. <BR>[Called By]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    755. 

  755. </UL>
    756. 

  756. 

  757. <P><STRONG><a name="[135]"></a>__aeabi_cdrcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdrcmple.o(.text), UNUSED)
    758. 

  758. <BR><BR>[Called By]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    759. 

  759. </UL>
    760. 

  760. 

  761. <P><STRONG><a name="[9c]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    762. 

  762. <BR><BR>[Calls]<UL><LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    763. 

  763. </UL>
    764. 

  764. <BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    765. 

  765. </UL>
    766. 

  766. 

  767. <P><STRONG><a name="[16d]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    768. 

  768. 

  769. <P><STRONG><a name="[a5]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
    770. 

  770. <BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    771. 

  771. </UL>
    772. 

  772. 

  773. <P><STRONG><a name="[16e]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
    774. 

  774. 

  775. <P><STRONG><a name="[a7]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text), UNUSED)
    776. 

  776. <BR><BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    777. 

  777. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    778. 

  778. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    779. 

  779. </UL>
    780. 

  780. 

  781. <P><STRONG><a name="[a6]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text), UNUSED)
    782. 

  782. <BR><BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    783. 

  783. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    784. 

  784. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    785. 

  785. </UL>
    786. 

  786. <BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    787. 

  787. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    788. 

  788. </UL>
    789. 

  789. 

  790. <P><STRONG><a name="[ae]"></a>ADC_ConfigureBoostMode</STRONG> (Thumb, 322 bytes, Stack size 16 bytes, stm32h7xx_hal_adc.o(i.ADC_ConfigureBoostMode))
    791. 

  791. <BR><BR>[Stack]<UL><LI>Max Depth = 116<LI>Call Chain = ADC_ConfigureBoostMode &rArr; HAL_RCCEx_GetPeriphCLKFreq &rArr; HAL_RCCEx_GetD3PCLK1Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    792. 

  792. </UL>
    793. 

  793. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    794. 

  794. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPeriphCLKFreq
    795. 

  795. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetREVID
    796. 

  796. </UL>
    797. 

  797. <BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    798. 

  798. </UL>
    799. 

  799. 

  800. <P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.BusFault_Handler))
    801. 

  801. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    802. 

  802. </UL>
    803. 

  803. <P><STRONG><a name="[b2]"></a>DMP_Init</STRONG> (Thumb, 250 bytes, Stack size 40 bytes, mpu6050.o(i.DMP_Init))
    804. 

  804. <BR><BR>[Stack]<UL><LI>Max Depth = 408<LI>Call Chain = DMP_Init &rArr; run_self_test &rArr; mpu_run_self_test &rArr; mpu_set_dmp_state &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    805. 

  805. </UL>
    806. 

  806. <BR>[Calls]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_orientation
    807. 

  807. <LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_fifo_rate
    808. 

  808. <LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_load_motion_driver_firmware
    809. 

  809. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    810. 

  810. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sensors
    811. 

  811. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    812. 

  812. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    813. 

  813. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    814. 

  814. <LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_sample_rate
    815. 

  815. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_gyro_fsr
    816. 

  816. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_accel_fsr
    817. 

  817. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_configure_fifo
    818. 

  818. <LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    819. 

  819. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;inv_row_2_scale
    820. 

  820. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
    821. 

  821. </UL>
    822. 

  822. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    823. 

  823. </UL>
    824. 

  824. 

  825. <P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.DebugMon_Handler))
    826. 

  826. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    827. 

  827. </UL>
    828. 

  828. <P><STRONG><a name="[d0]"></a>Error_Handler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, main.o(i.Error_Handler))
    829. 

  829. <BR><BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    830. 

  830. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_MspInit
    831. 

  831. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
    832. 

  832. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    833. 

  833. <LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
    834. 

  834. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    835. 

  835. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    836. 

  836. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    837. 

  837. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_QUADSPI_Init
    838. 

  838. <LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C3_Init
    839. 

  839. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C2_Init
    840. 

  840. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
    841. 

  841. <LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    842. 

  842. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    843. 

  843. </UL>
    844. 

  844. 

  845. <P><STRONG><a name="[c2]"></a>HAL_ADCEx_MultiModeConfigChannel</STRONG> (Thumb, 336 bytes, Stack size 128 bytes, stm32h7xx_hal_adc_ex.o(i.HAL_ADCEx_MultiModeConfigChannel))
    846. 

  846. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = HAL_ADCEx_MultiModeConfigChannel
    847. 

  847. </UL>
    848. 

  848. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    849. 

  849. <LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    850. 

  850. </UL>
    851. 

  851. <BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    852. 

  852. </UL>
    853. 

  853. 

  854. <P><STRONG><a name="[c5]"></a>HAL_ADC_ConfigChannel</STRONG> (Thumb, 1314 bytes, Stack size 40 bytes, stm32h7xx_hal_adc.o(i.HAL_ADC_ConfigChannel))
    855. 

  855. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = HAL_ADC_ConfigChannel &rArr; LL_ADC_SetChannelSamplingTime
    856. 

  856. </UL>
    857. 

  857. <BR>[Calls]<UL><LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetCommonPathInternalCh
    858. 

  858. <LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_SetChannelSamplingTime
    859. 

  859. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    860. 

  860. <LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    861. 

  861. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsConversionOngoing
    862. 

  862. </UL>
    863. 

  863. <BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    864. 

  864. </UL>
    865. 

  865. 

  866. <P><STRONG><a name="[cb]"></a>HAL_ADC_Init</STRONG> (Thumb, 608 bytes, Stack size 40 bytes, stm32h7xx_hal_adc.o(i.HAL_ADC_Init))
    867. 

  867. <BR><BR>[Stack]<UL><LI>Max Depth = 320<LI>Call Chain = HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    868. 

  868. </UL>
    869. 

  869. <BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_REG_IsConversionOngoing
    870. 

  870. <LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsInternalRegulatorEnabled
    871. 

  871. <LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_IsEnabled
    872. 

  872. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;LL_ADC_INJ_IsConversionOngoing
    873. 

  873. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    874. 

  874. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetREVID
    875. 

  875. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConfigureBoostMode
    876. 

  876. </UL>
    877. 

  877. <BR>[Called By]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    878. 

  878. </UL>
    879. 

  879. 

  880. <P><STRONG><a name="[cc]"></a>HAL_ADC_MspInit</STRONG> (Thumb, 216 bytes, Stack size 232 bytes, adc.o(i.HAL_ADC_MspInit))
    881. 

  881. <BR><BR>[Stack]<UL><LI>Max Depth = 280<LI>Call Chain = HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    882. 

  882. </UL>
    883. 

  883. <BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    884. 

  884. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    885. 

  885. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    886. 

  886. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    887. 

  887. </UL>
    888. 

  888. <BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    889. 

  889. </UL>
    890. 

  890. 

  891. <P><STRONG><a name="[d2]"></a>HAL_Delay</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, stm32h7xx_hal.o(i.HAL_Delay))
    892. 

  892. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_Delay
    893. 

  893. </UL>
    894. 

  894. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    895. 

  895. </UL>
    896. 

  896. <BR>[Called By]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sensors
    897. 

  897. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_bypass
    898. 

  898. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    899. 

  899. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    900. 

  900. <LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_st_biases
    901. 

  901. </UL>
    902. 

  902. 

  903. <P><STRONG><a name="[d1]"></a>HAL_GPIO_Init</STRONG> (Thumb, 456 bytes, Stack size 24 bytes, stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init))
    904. 

  904. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_GPIO_Init
    905. 

  905. </UL>
    906. 

  906. <BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    907. 

  907. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    908. 

  908. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_MspInit
    909. 

  909. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
    910. 

  910. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    911. 

  911. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    912. 

  912. </UL>
    913. 

  913. 

  914. <P><STRONG><a name="[111]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin))
    915. 

  915. <BR><BR>[Called By]<UL><LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    916. 

  916. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    917. 

  917. </UL>
    918. 

  918. 

  919. <P><STRONG><a name="[b1]"></a>HAL_GetREVID</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32h7xx_hal.o(i.HAL_GetREVID))
    920. 

  920. <BR><BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    921. 

  921. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    922. 

  922. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConfigureBoostMode
    923. 

  923. </UL>
    924. 

  924. 

  925. <P><STRONG><a name="[d3]"></a>HAL_GetTick</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32h7xx_hal.o(i.HAL_GetTick))
    926. 

  926. <BR><BR>[Called By]<UL><LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_tick_count
    927. 

  927. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    928. 

  928. <LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    929. 

  929. <LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
    930. 

  930. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    931. 

  931. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    932. 

  932. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_Init
    933. 

  933. <LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_ConfigSupply
    934. 

  934. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    935. 

  935. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Receive
    936. 

  936. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL3_Config
    937. 

  937. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL2_Config
    938. 

  938. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXISFlagUntilTimeout
    939. 

  939. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnSTOPFlagUntilTimeout
    940. 

  940. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnRXNEFlagUntilTimeout
    941. 

  941. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
    942. 

  942. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsErrorOccurred
    943. 

  943. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;QSPI_WaitFlagStateUntilTimeout
    944. 

  944. <LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
    945. 

  945. <LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
    946. 

  946. </UL>
    947. 

  947. 

  948. <P><STRONG><a name="[113]"></a>HAL_I2CEx_ConfigAnalogFilter</STRONG> (Thumb, 106 bytes, Stack size 0 bytes, stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_ConfigAnalogFilter))
    949. 

  949. <BR><BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C3_Init
    950. 

  950. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C2_Init
    951. 

  951. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
    952. 

  952. </UL>
    953. 

  953. 

  954. <P><STRONG><a name="[114]"></a>HAL_I2CEx_ConfigDigitalFilter</STRONG> (Thumb, 104 bytes, Stack size 8 bytes, stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_ConfigDigitalFilter))
    955. 

  955. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_I2CEx_ConfigDigitalFilter
    956. 

  956. </UL>
    957. 

  957. <BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C3_Init
    958. 

  958. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C2_Init
    959. 

  959. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
    960. 

  960. </UL>
    961. 

  961. 

  962. <P><STRONG><a name="[115]"></a>HAL_I2CEx_EnableFastModePlus</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, stm32h7xx_hal_i2c_ex.o(i.HAL_I2CEx_EnableFastModePlus))
    963. 

  963. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_I2CEx_EnableFastModePlus
    964. 

  964. </UL>
    965. 

  965. <BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C3_Init
    966. 

  966. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C2_Init
    967. 

  967. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
    968. 

  968. </UL>
    969. 

  969. 

  970. <P><STRONG><a name="[d4]"></a>HAL_I2C_Init</STRONG> (Thumb, 212 bytes, Stack size 8 bytes, stm32h7xx_hal_i2c.o(i.HAL_I2C_Init))
    971. 

  971. <BR><BR>[Stack]<UL><LI>Max Depth = 288<LI>Call Chain = HAL_I2C_Init &rArr; HAL_I2C_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    972. 

  972. </UL>
    973. 

  973. <BR>[Calls]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
    974. 

  974. </UL>
    975. 

  975. <BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C3_Init
    976. 

  976. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C2_Init
    977. 

  977. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
    978. 

  978. </UL>
    979. 

  979. 

  980. <P><STRONG><a name="[d6]"></a>HAL_I2C_Master_Receive</STRONG> (Thumb, 348 bytes, Stack size 32 bytes, stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Receive))
    981. 

  981. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_I2C_Master_Receive &rArr; I2C_WaitOnRXNEFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    982. 

  982. </UL>
    983. 

  983. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    984. 

  984. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnSTOPFlagUntilTimeout
    985. 

  985. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnRXNEFlagUntilTimeout
    986. 

  986. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
    987. 

  987. <LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_TransferConfig
    988. 

  988. </UL>
    989. 

  989. <BR>[Called By]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    990. 

  990. </UL>
    991. 

  991. 

  992. <P><STRONG><a name="[db]"></a>HAL_I2C_Master_Transmit</STRONG> (Thumb, 390 bytes, Stack size 40 bytes, stm32h7xx_hal_i2c.o(i.HAL_I2C_Master_Transmit))
    993. 

  993. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    994. 

  994. </UL>
    995. 

  995. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    996. 

  996. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXISFlagUntilTimeout
    997. 

  997. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnSTOPFlagUntilTimeout
    998. 

  998. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
    999. 

  999. <LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_TransferConfig
    1000. 

  1000. </UL>
    1001. 

  1001. <BR>[Called By]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    1002. 

  1002. <LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    1003. 

  1003. </UL>
    1004. 

  1004. 

  1005. <P><STRONG><a name="[d5]"></a>HAL_I2C_MspInit</STRONG> (Thumb, 436 bytes, Stack size 232 bytes, i2c.o(i.HAL_I2C_MspInit))
    1006. 

  1006. <BR><BR>[Stack]<UL><LI>Max Depth = 280<LI>Call Chain = HAL_I2C_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1007. 

  1007. </UL>
    1008. 

  1008. <BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    1009. 

  1009. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1010. 

  1010. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1011. 

  1011. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1012. 

  1012. </UL>
    1013. 

  1013. <BR>[Called By]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
    1014. 

  1014. </UL>
    1015. 

  1015. 

  1016. <P><STRONG><a name="[124]"></a>HAL_IncTick</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32h7xx_hal.o(i.HAL_IncTick))
    1017. 

  1017. <BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
    1018. 

  1018. </UL>
    1019. 

  1019. 

  1020. <P><STRONG><a name="[dd]"></a>HAL_Init</STRONG> (Thumb, 80 bytes, Stack size 8 bytes, stm32h7xx_hal.o(i.HAL_Init))
    1021. 

  1021. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1022. 

  1022. </UL>
    1023. 

  1023. <BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
    1024. 

  1024. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1025. 

  1025. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    1026. 

  1026. <LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
    1027. 

  1027. </UL>
    1028. 

  1028. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1029. 

  1029. </UL>
    1030. 

  1030. 

  1031. <P><STRONG><a name="[e0]"></a>HAL_InitTick</STRONG> (Thumb, 74 bytes, Stack size 16 bytes, stm32h7xx_hal.o(i.HAL_InitTick))
    1032. 

  1032. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1033. 

  1033. </UL>
    1034. 

  1034. <BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
    1035. 

  1035. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1036. 

  1036. </UL>
    1037. 

  1037. <BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1038. 

  1038. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1039. 

  1039. </UL>
    1040. 

  1040. 

  1041. <P><STRONG><a name="[e1]"></a>HAL_MspInit</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32h7xx_hal_msp.o(i.HAL_MspInit))
    1042. 

  1042. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_MspInit
    1043. 

  1043. </UL>
    1044. 

  1044. <BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1045. 

  1045. </UL>
    1046. 

  1046. 

  1047. <P><STRONG><a name="[e3]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 122 bytes, Stack size 40 bytes, stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority))
    1048. 

  1048. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1049. 

  1049. </UL>
    1050. 

  1050. <BR>[Calls]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
    1051. 

  1051. <LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_GetPriorityGrouping
    1052. 

  1052. </UL>
    1053. 

  1053. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1054. 

  1054. </UL>
    1055. 

  1055. 

  1056. <P><STRONG><a name="[de]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping))
    1057. 

  1057. <BR><BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1058. 

  1058. </UL>
    1059. 

  1059. 

  1060. <P><STRONG><a name="[e6]"></a>HAL_PWREx_ConfigSupply</STRONG> (Thumb, 90 bytes, Stack size 16 bytes, stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply))
    1061. 

  1061. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_PWREx_ConfigSupply
    1062. 

  1062. </UL>
    1063. 

  1063. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1064. 

  1064. </UL>
    1065. 

  1065. <BR>[Called By]<UL><LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1066. 

  1066. </UL>
    1067. 

  1067. 

  1068. <P><STRONG><a name="[e7]"></a>HAL_QSPI_Init</STRONG> (Thumb, 168 bytes, Stack size 24 bytes, stm32h7xx_hal_qspi.o(i.HAL_QSPI_Init))
    1069. 

  1069. <BR><BR>[Stack]<UL><LI>Max Depth = 304<LI>Call Chain = HAL_QSPI_Init &rArr; HAL_QSPI_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1070. 

  1070. </UL>
    1071. 

  1071. <BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_MspInit
    1072. 

  1072. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1073. 

  1073. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_SetTimeout
    1074. 

  1074. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;QSPI_WaitFlagStateUntilTimeout
    1075. 

  1075. </UL>
    1076. 

  1076. <BR>[Called By]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_QUADSPI_Init
    1077. 

  1077. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1078. 

  1078. </UL>
    1079. 

  1079. 

  1080. <P><STRONG><a name="[e8]"></a>HAL_QSPI_MspInit</STRONG> (Thumb, 384 bytes, Stack size 232 bytes, quadspi.o(i.HAL_QSPI_MspInit))
    1081. 

  1081. <BR><BR>[Stack]<UL><LI>Max Depth = 280<LI>Call Chain = HAL_QSPI_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1082. 

  1082. </UL>
    1083. 

  1083. <BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    1084. 

  1084. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1085. 

  1085. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1086. 

  1086. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1087. 

  1087. </UL>
    1088. 

  1088. <BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_Init
    1089. 

  1089. </UL>
    1090. 

  1090. 

  1091. <P><STRONG><a name="[e9]"></a>HAL_QSPI_SetTimeout</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_hal_qspi.o(i.HAL_QSPI_SetTimeout))
    1092. 

  1092. <BR><BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_Init
    1093. 

  1093. </UL>
    1094. 

  1094. 

  1095. <P><STRONG><a name="[eb]"></a>HAL_RCCEx_GetD3PCLK1Freq</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq))
    1096. 

  1096. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_RCCEx_GetD3PCLK1Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    1097. 

  1097. </UL>
    1098. 

  1098. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    1099. 

  1099. </UL>
    1100. 

  1100. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPeriphCLKFreq
    1101. 

  1101. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1102. 

  1102. </UL>
    1103. 

  1103. 

  1104. <P><STRONG><a name="[ec]"></a>HAL_RCCEx_GetPLL1ClockFreq</STRONG> (Thumb, 536 bytes, Stack size 16 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL1ClockFreq))
    1105. 

  1105. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_RCCEx_GetPLL1ClockFreq
    1106. 

  1106. </UL>
    1107. 

  1107. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPeriphCLKFreq
    1108. 

  1108. </UL>
    1109. 

  1109. 

  1110. <P><STRONG><a name="[ed]"></a>HAL_RCCEx_GetPLL2ClockFreq</STRONG> (Thumb, 536 bytes, Stack size 16 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL2ClockFreq))
    1111. 

  1111. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_RCCEx_GetPLL2ClockFreq
    1112. 

  1112. </UL>
    1113. 

  1113. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPeriphCLKFreq
    1114. 

  1114. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1115. 

  1115. </UL>
    1116. 

  1116. 

  1117. <P><STRONG><a name="[ee]"></a>HAL_RCCEx_GetPLL3ClockFreq</STRONG> (Thumb, 536 bytes, Stack size 16 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL3ClockFreq))
    1118. 

  1118. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_RCCEx_GetPLL3ClockFreq
    1119. 

  1119. </UL>
    1120. 

  1120. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPeriphCLKFreq
    1121. 

  1121. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1122. 

  1122. </UL>
    1123. 

  1123. 

  1124. <P><STRONG><a name="[b0]"></a>HAL_RCCEx_GetPeriphCLKFreq</STRONG> (Thumb, 2216 bytes, Stack size 64 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPeriphCLKFreq))
    1125. 

  1125. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = HAL_RCCEx_GetPeriphCLKFreq &rArr; HAL_RCCEx_GetD3PCLK1Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    1126. 

  1126. </UL>
    1127. 

  1127. <BR>[Calls]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL3ClockFreq
    1128. 

  1128. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL2ClockFreq
    1129. 

  1129. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL1ClockFreq
    1130. 

  1130. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetD3PCLK1Freq
    1131. 

  1131. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
    1132. 

  1132. </UL>
    1133. 

  1133. <BR>[Called By]<UL><LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConfigureBoostMode
    1134. 

  1134. </UL>
    1135. 

  1135. 

  1136. <P><STRONG><a name="[cf]"></a>HAL_RCCEx_PeriphCLKConfig</STRONG> (Thumb, 3432 bytes, Stack size 24 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig))
    1137. 

  1137. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1138. 

  1138. </UL>
    1139. 

  1139. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1140. 

  1140. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL3_Config
    1141. 

  1141. <LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL2_Config
    1142. 

  1142. </UL>
    1143. 

  1143. <BR>[Called By]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    1144. 

  1144. <LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_MspInit
    1145. 

  1145. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_MspInit
    1146. 

  1146. <LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_MspInit
    1147. 

  1147. </UL>
    1148. 

  1148. 

  1149. <P><STRONG><a name="[f2]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 774 bytes, Stack size 24 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig))
    1150. 

  1150. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1151. 

  1151. </UL>
    1152. 

  1152. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1153. 

  1153. <LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1154. 

  1154. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    1155. 

  1155. </UL>
    1156. 

  1156. <BR>[Called By]<UL><LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1157. 

  1157. </UL>
    1158. 

  1158. 

  1159. <P><STRONG><a name="[af]"></a>HAL_RCC_GetHCLKFreq</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq))
    1160. 

  1160. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    1161. 

  1161. </UL>
    1162. 

  1162. <BR>[Calls]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    1163. 

  1163. </UL>
    1164. 

  1164. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetD3PCLK1Freq
    1165. 

  1165. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
    1166. 

  1166. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
    1167. 

  1167. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_ConfigureBoostMode
    1168. 

  1168. </UL>
    1169. 

  1169. 

  1170. <P><STRONG><a name="[ef]"></a>HAL_RCC_GetPCLK1Freq</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq))
    1171. 

  1171. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_RCC_GetPCLK1Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    1172. 

  1172. </UL>
    1173. 

  1173. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    1174. 

  1174. </UL>
    1175. 

  1175. <BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPeriphCLKFreq
    1176. 

  1176. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1177. 

  1177. </UL>
    1178. 

  1178. 

  1179. <P><STRONG><a name="[f3]"></a>HAL_RCC_GetPCLK2Freq</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq))
    1180. 

  1180. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_RCC_GetPCLK2Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
    1181. 

  1181. </UL>
    1182. 

  1182. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    1183. 

  1183. </UL>
    1184. 

  1184. <BR>[Called By]<UL><LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1185. 

  1185. </UL>
    1186. 

  1186. 

  1187. <P><STRONG><a name="[df]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 524 bytes, Stack size 20 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq))
    1188. 

  1188. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_RCC_GetSysClockFreq
    1189. 

  1189. </UL>
    1190. 

  1190. <BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1191. 

  1191. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1192. 

  1192. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    1193. 

  1193. </UL>
    1194. 

  1194. 

  1195. <P><STRONG><a name="[f4]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 2130 bytes, Stack size 32 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig))
    1196. 

  1196. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_RCC_OscConfig
    1197. 

  1197. </UL>
    1198. 

  1198. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1199. 

  1199. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetREVID
    1200. 

  1200. </UL>
    1201. 

  1201. <BR>[Called By]<UL><LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1202. 

  1202. </UL>
    1203. 

  1203. 

  1204. <P><STRONG><a name="[e2]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Config))
    1205. 

  1205. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_SYSTICK_Config &rArr; __NVIC_SetPriority
    1206. 

  1206. </UL>
    1207. 

  1207. <BR>[Calls]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
    1208. 

  1208. </UL>
    1209. 

  1209. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1210. 

  1210. </UL>
    1211. 

  1211. 

  1212. <P><STRONG><a name="[11b]"></a>HAL_TIMEx_ConfigBreakDeadTime</STRONG> (Thumb, 172 bytes, Stack size 8 bytes, stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_ConfigBreakDeadTime))
    1213. 

  1213. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIMEx_ConfigBreakDeadTime
    1214. 

  1214. </UL>
    1215. 

  1215. <BR>[Called By]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1216. 

  1216. </UL>
    1217. 

  1217. 

  1218. <P><STRONG><a name="[11a]"></a>HAL_TIMEx_MasterConfigSynchronization</STRONG> (Thumb, 174 bytes, Stack size 12 bytes, stm32h7xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization))
    1219. 

  1219. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_TIMEx_MasterConfigSynchronization
    1220. 

  1220. </UL>
    1221. 

  1221. <BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1222. 

  1222. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1223. 

  1223. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1224. 

  1224. </UL>
    1225. 

  1225. 

  1226. <P><STRONG><a name="[f5]"></a>HAL_TIM_MspPostInit</STRONG> (Thumb, 212 bytes, Stack size 32 bytes, tim.o(i.HAL_TIM_MspPostInit))
    1227. 

  1227. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1228. 

  1228. </UL>
    1229. 

  1229. <BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1230. 

  1230. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1231. 

  1231. </UL>
    1232. 

  1232. <BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1233. 

  1233. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1234. 

  1234. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1235. 

  1235. </UL>
    1236. 

  1236. 

  1237. <P><STRONG><a name="[f6]"></a>HAL_TIM_PWM_ConfigChannel</STRONG> (Thumb, 368 bytes, Stack size 24 bytes, stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel))
    1238. 

  1238. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_TIM_PWM_ConfigChannel &rArr; TIM_OC2_SetConfig
    1239. 

  1239. </UL>
    1240. 

  1240. <BR>[Calls]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC2_SetConfig
    1241. 

  1241. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC6_SetConfig
    1242. 

  1242. <LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC5_SetConfig
    1243. 

  1243. <LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC4_SetConfig
    1244. 

  1244. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC3_SetConfig
    1245. 

  1245. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC1_SetConfig
    1246. 

  1246. </UL>
    1247. 

  1247. <BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1248. 

  1248. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1249. 

  1249. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1250. 

  1250. </UL>
    1251. 

  1251. 

  1252. <P><STRONG><a name="[fd]"></a>HAL_TIM_PWM_Init</STRONG> (Thumb, 110 bytes, Stack size 8 bytes, stm32h7xx_hal_tim.o(i.HAL_TIM_PWM_Init))
    1253. 

  1253. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIM_PWM_Init &rArr; TIM_Base_SetConfig
    1254. 

  1254. </UL>
    1255. 

  1255. <BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
    1256. 

  1256. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
    1257. 

  1257. </UL>
    1258. 

  1258. <BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1259. 

  1259. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1260. 

  1260. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1261. 

  1261. </UL>
    1262. 

  1262. 

  1263. <P><STRONG><a name="[fe]"></a>HAL_TIM_PWM_MspInit</STRONG> (Thumb, 120 bytes, Stack size 8 bytes, tim.o(i.HAL_TIM_PWM_MspInit))
    1264. 

  1264. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIM_PWM_MspInit
    1265. 

  1265. </UL>
    1266. 

  1266. <BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1267. 

  1267. </UL>
    1268. 

  1268. 

  1269. <P><STRONG><a name="[11f]"></a>HAL_UARTEx_DisableFifoMode</STRONG> (Thumb, 78 bytes, Stack size 0 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_DisableFifoMode))
    1270. 

  1270. <BR><BR>[Called By]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
    1271. 

  1271. </UL>
    1272. 

  1272. 

  1273. <P><STRONG><a name="[100]"></a>HAL_UARTEx_SetRxFifoThreshold</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetRxFifoThreshold))
    1274. 

  1274. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_UARTEx_SetRxFifoThreshold &rArr; UARTEx_SetNbDataToProcess
    1275. 

  1275. </UL>
    1276. 

  1276. <BR>[Calls]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UARTEx_SetNbDataToProcess
    1277. 

  1277. </UL>
    1278. 

  1278. <BR>[Called By]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
    1279. 

  1279. </UL>
    1280. 

  1280. 

  1281. <P><STRONG><a name="[102]"></a>HAL_UARTEx_SetTxFifoThreshold</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetTxFifoThreshold))
    1282. 

  1282. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_UARTEx_SetTxFifoThreshold &rArr; UARTEx_SetNbDataToProcess
    1283. 

  1283. </UL>
    1284. 

  1284. <BR>[Calls]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UARTEx_SetNbDataToProcess
    1285. 

  1285. </UL>
    1286. 

  1286. <BR>[Called By]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
    1287. 

  1287. </UL>
    1288. 

  1288. 

  1289. <P><STRONG><a name="[103]"></a>HAL_UART_Init</STRONG> (Thumb, 120 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_Init))
    1290. 

  1290. <BR><BR>[Stack]<UL><LI>Max Depth = 288<LI>Call Chain = HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1291. 

  1291. </UL>
    1292. 

  1292. <BR>[Calls]<UL><LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    1293. 

  1293. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1294. 

  1294. <LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
    1295. 

  1295. <LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_AdvFeatureConfig
    1296. 

  1296. </UL>
    1297. 

  1297. <BR>[Called By]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
    1298. 

  1298. </UL>
    1299. 

  1299. 

  1300. <P><STRONG><a name="[104]"></a>HAL_UART_MspInit</STRONG> (Thumb, 142 bytes, Stack size 232 bytes, usart.o(i.HAL_UART_MspInit))
    1301. 

  1301. <BR><BR>[Stack]<UL><LI>Max Depth = 280<LI>Call Chain = HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1302. 

  1302. </UL>
    1303. 

  1303. <BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    1304. 

  1304. <LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1305. 

  1305. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1306. 

  1306. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1307. 

  1307. </UL>
    1308. 

  1308. <BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1309. 

  1309. </UL>
    1310. 

  1310. 

  1311. <P><STRONG><a name="[108]"></a>HAL_UART_Transmit</STRONG> (Thumb, 194 bytes, Stack size 40 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_Transmit))
    1312. 

  1312. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout
    1313. 

  1313. </UL>
    1314. 

  1314. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1315. 

  1315. <LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
    1316. 

  1316. </UL>
    1317. 

  1317. <BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
    1318. 

  1318. </UL>
    1319. 

  1319. 

  1320. <P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.HardFault_Handler))
    1321. 

  1321. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1322. 

  1322. </UL>
    1323. 

  1323. <P><STRONG><a name="[10c]"></a>IIC_Read_Len</STRONG> (Thumb, 266 bytes, Stack size 40 bytes, mpu6050.o(i.IIC_Read_Len))
    1324. 

  1324. <BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = IIC_Read_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1325. 

  1325. </UL>
    1326. 

  1326. <BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    1327. 

  1327. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Receive
    1328. 

  1328. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
    1329. 

  1329. </UL>
    1330. 

  1330. <BR>[Called By]<UL><LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_bypass
    1331. 

  1331. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_read_mem
    1332. 

  1332. <LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_read_fifo_stream
    1333. 

  1333. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    1334. 

  1334. <LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gyro_self_test
    1335. 

  1335. <LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_st_biases
    1336. 

  1336. <LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_accel_prod_shift
    1337. 

  1337. <LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MPU_Get_Gyroscope
    1338. 

  1338. </UL>
    1339. 

  1339. 

  1340. <P><STRONG><a name="[10d]"></a>IIC_Write_Len</STRONG> (Thumb, 178 bytes, Stack size 40 bytes, mpu6050.o(i.IIC_Write_Len))
    1341. 

  1341. <BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1342. 

  1342. </UL>
    1343. 

  1343. <BR>[Calls]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    1344. 

  1344. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
    1345. 

  1345. </UL>
    1346. 

  1346. <BR>[Called By]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1347. 

  1347. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sensors
    1348. 

  1348. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    1349. 

  1349. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_lpf
    1350. 

  1350. <LI><a href="#[159]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_int_latched
    1351. 

  1351. <LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_gyro_fsr
    1352. 

  1352. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    1353. 

  1353. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_bypass
    1354. 

  1354. <LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_accel_fsr
    1355. 

  1355. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1356. 

  1356. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_read_mem
    1357. 

  1357. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_lp_accel_mode
    1358. 

  1358. <LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_load_firmware
    1359. 

  1359. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    1360. 

  1360. <LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_int_enable
    1361. 

  1361. <LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_st_biases
    1362. 

  1362. </UL>
    1363. 

  1363. 

  1364. <P><STRONG><a name="[10e]"></a>MPU_Get_Gyroscope</STRONG> (Thumb, 82 bytes, Stack size 32 bytes, mpu6050.o(i.MPU_Get_Gyroscope))
    1365. 

  1365. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = MPU_Get_Gyroscope &rArr; IIC_Read_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1366. 

  1366. </UL>
    1367. 

  1367. <BR>[Calls]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    1368. 

  1368. </UL>
    1369. 

  1369. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1370. 

  1370. </UL>
    1371. 

  1371. 

  1372. <P><STRONG><a name="[10f]"></a>MX_ADC1_Init</STRONG> (Thumb, 144 bytes, Stack size 48 bytes, adc.o(i.MX_ADC1_Init))
    1373. 

  1373. <BR><BR>[Stack]<UL><LI>Max Depth = 368<LI>Call Chain = MX_ADC1_Init &rArr; HAL_ADC_Init &rArr; HAL_ADC_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1374. 

  1374. </UL>
    1375. 

  1375. <BR>[Calls]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    1376. 

  1376. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    1377. 

  1377. <LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_MultiModeConfigChannel
    1378. 

  1378. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1379. 

  1379. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1380. 

  1380. </UL>
    1381. 

  1381. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1382. 

  1382. </UL>
    1383. 

  1383. 

  1384. <P><STRONG><a name="[110]"></a>MX_GPIO_Init</STRONG> (Thumb, 242 bytes, Stack size 32 bytes, gpio.o(i.MX_GPIO_Init))
    1385. 

  1385. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
    1386. 

  1386. </UL>
    1387. 

  1387. <BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1388. 

  1388. <LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    1389. 

  1389. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1390. 

  1390. </UL>
    1391. 

  1391. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1392. 

  1392. </UL>
    1393. 

  1393. 

  1394. <P><STRONG><a name="[112]"></a>MX_I2C1_Init</STRONG> (Thumb, 80 bytes, Stack size 8 bytes, i2c.o(i.MX_I2C1_Init))
    1395. 

  1395. <BR><BR>[Stack]<UL><LI>Max Depth = 296<LI>Call Chain = MX_I2C1_Init &rArr; HAL_I2C_Init &rArr; HAL_I2C_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1396. 

  1396. </UL>
    1397. 

  1397. <BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
    1398. 

  1398. <LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_EnableFastModePlus
    1399. 

  1399. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_ConfigDigitalFilter
    1400. 

  1400. <LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_ConfigAnalogFilter
    1401. 

  1401. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1402. 

  1402. </UL>
    1403. 

  1403. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1404. 

  1404. </UL>
    1405. 

  1405. 

  1406. <P><STRONG><a name="[116]"></a>MX_I2C2_Init</STRONG> (Thumb, 80 bytes, Stack size 8 bytes, i2c.o(i.MX_I2C2_Init))
    1407. 

  1407. <BR><BR>[Stack]<UL><LI>Max Depth = 296<LI>Call Chain = MX_I2C2_Init &rArr; HAL_I2C_Init &rArr; HAL_I2C_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1408. 

  1408. </UL>
    1409. 

  1409. <BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
    1410. 

  1410. <LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_EnableFastModePlus
    1411. 

  1411. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_ConfigDigitalFilter
    1412. 

  1412. <LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_ConfigAnalogFilter
    1413. 

  1413. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1414. 

  1414. </UL>
    1415. 

  1415. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1416. 

  1416. </UL>
    1417. 

  1417. 

  1418. <P><STRONG><a name="[117]"></a>MX_I2C3_Init</STRONG> (Thumb, 80 bytes, Stack size 8 bytes, i2c.o(i.MX_I2C3_Init))
    1419. 

  1419. <BR><BR>[Stack]<UL><LI>Max Depth = 296<LI>Call Chain = MX_I2C3_Init &rArr; HAL_I2C_Init &rArr; HAL_I2C_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1420. 

  1420. </UL>
    1421. 

  1421. <BR>[Calls]<UL><LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Init
    1422. 

  1422. <LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_EnableFastModePlus
    1423. 

  1423. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_ConfigDigitalFilter
    1424. 

  1424. <LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2CEx_ConfigAnalogFilter
    1425. 

  1425. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1426. 

  1426. </UL>
    1427. 

  1427. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1428. 

  1428. </UL>
    1429. 

  1429. 

  1430. <P><STRONG><a name="[118]"></a>MX_QUADSPI_Init</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, quadspi.o(i.MX_QUADSPI_Init))
    1431. 

  1431. <BR><BR>[Stack]<UL><LI>Max Depth = 312<LI>Call Chain = MX_QUADSPI_Init &rArr; HAL_QSPI_Init &rArr; HAL_QSPI_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1432. 

  1432. </UL>
    1433. 

  1433. <BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_Init
    1434. 

  1434. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1435. 

  1435. </UL>
    1436. 

  1436. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1437. 

  1437. </UL>
    1438. 

  1438. 

  1439. <P><STRONG><a name="[119]"></a>MX_TIM1_Init</STRONG> (Thumb, 232 bytes, Stack size 88 bytes, tim.o(i.MX_TIM1_Init))
    1440. 

  1440. <BR><BR>[Stack]<UL><LI>Max Depth = 144<LI>Call Chain = MX_TIM1_Init &rArr; HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1441. 

  1441. </UL>
    1442. 

  1442. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1443. 

  1443. <LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1444. 

  1444. <LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1445. 

  1445. <LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_ConfigBreakDeadTime
    1446. 

  1446. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1447. 

  1447. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1448. 

  1448. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1449. 

  1449. </UL>
    1450. 

  1450. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1451. 

  1451. </UL>
    1452. 

  1452. 

  1453. <P><STRONG><a name="[11c]"></a>MX_TIM3_Init</STRONG> (Thumb, 132 bytes, Stack size 48 bytes, tim.o(i.MX_TIM3_Init))
    1454. 

  1454. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = MX_TIM3_Init &rArr; HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1455. 

  1455. </UL>
    1456. 

  1456. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1457. 

  1457. <LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1458. 

  1458. <LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1459. 

  1459. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1460. 

  1460. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1461. 

  1461. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1462. 

  1462. </UL>
    1463. 

  1463. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1464. 

  1464. </UL>
    1465. 

  1465. 

  1466. <P><STRONG><a name="[11d]"></a>MX_TIM4_Init</STRONG> (Thumb, 132 bytes, Stack size 48 bytes, tim.o(i.MX_TIM4_Init))
    1467. 

  1467. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = MX_TIM4_Init &rArr; HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1468. 

  1468. </UL>
    1469. 

  1469. <BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1470. 

  1470. <LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1471. 

  1471. <LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1472. 

  1472. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1473. 

  1473. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1474. 

  1474. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1475. 

  1475. </UL>
    1476. 

  1476. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1477. 

  1477. </UL>
    1478. 

  1478. 

  1479. <P><STRONG><a name="[11e]"></a>MX_USART2_UART_Init</STRONG> (Thumb, 98 bytes, Stack size 8 bytes, usart.o(i.MX_USART2_UART_Init))
    1480. 

  1480. <BR><BR>[Stack]<UL><LI>Max Depth = 296<LI>Call Chain = MX_USART2_UART_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
    1481. 

  1481. </UL>
    1482. 

  1482. <BR>[Calls]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1483. 

  1483. <LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetTxFifoThreshold
    1484. 

  1484. <LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetRxFifoThreshold
    1485. 

  1485. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_DisableFifoMode
    1486. 

  1486. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1487. 

  1487. </UL>
    1488. 

  1488. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1489. 

  1489. </UL>
    1490. 

  1490. 

  1491. <P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.MemManage_Handler))
    1492. 

  1492. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1493. 

  1493. </UL>
    1494. 

  1494. <P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.NMI_Handler))
    1495. 

  1495. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1496. 

  1496. </UL>
    1497. 

  1497. <P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.PendSV_Handler))
    1498. 

  1498. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1499. 

  1499. </UL>
    1500. 

  1500. <P><STRONG><a name="[120]"></a>Read_DMP</STRONG> (Thumb, 436 bytes, Stack size 88 bytes, mpu6050.o(i.Read_DMP))
    1501. 

  1501. <BR><BR>[Stack]<UL><LI>Max Depth = 360<LI>Call Chain = Read_DMP &rArr; dmp_read_fifo &rArr; mpu_read_fifo_stream &rArr; mpu_reset_fifo &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1502. 

  1502. </UL>
    1503. 

  1503. <BR>[Calls]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_read_fifo
    1504. 

  1504. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan2
    1505. 

  1505. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1506. 

  1506. </UL>
    1507. 

  1507. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1508. 

  1508. </UL>
    1509. 

  1509. 

  1510. <P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.SVC_Handler))
    1511. 

  1511. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1512. 

  1512. </UL>
    1513. 

  1513. <P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, stm32h7xx_it.o(i.SysTick_Handler))
    1514. 

  1514. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = SysTick_Handler
    1515. 

  1515. </UL>
    1516. 

  1516. <BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
    1517. 

  1517. </UL>
    1518. 

  1518. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1519. 

  1519. </UL>
    1520. 

  1520. <P><STRONG><a name="[125]"></a>SystemClock_Config</STRONG> (Thumb, 202 bytes, Stack size 120 bytes, main.o(i.SystemClock_Config))
    1521. 

  1521. <BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1522. 

  1522. </UL>
    1523. 

  1523. <BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    1524. 

  1524. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1525. 

  1525. <LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_ConfigSupply
    1526. 

  1526. <LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1527. 

  1527. <LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1528. 

  1528. </UL>
    1529. 

  1529. <BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1530. 

  1530. </UL>
    1531. 

  1531. 

  1532. <P><STRONG><a name="[97]"></a>SystemInit</STRONG> (Thumb, 212 bytes, Stack size 0 bytes, system_stm32h7xx.o(i.SystemInit))
    1533. 

  1533. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(.text)
    1534. 

  1534. </UL>
    1535. 

  1535. <P><STRONG><a name="[ff]"></a>TIM_Base_SetConfig</STRONG> (Thumb, 186 bytes, Stack size 8 bytes, stm32h7xx_hal_tim.o(i.TIM_Base_SetConfig))
    1536. 

  1536. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM_Base_SetConfig
    1537. 

  1537. </UL>
    1538. 

  1538. <BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1539. 

  1539. </UL>
    1540. 

  1540. 

  1541. <P><STRONG><a name="[f8]"></a>TIM_OC2_SetConfig</STRONG> (Thumb, 156 bytes, Stack size 12 bytes, stm32h7xx_hal_tim.o(i.TIM_OC2_SetConfig))
    1542. 

  1542. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC2_SetConfig
    1543. 

  1543. </UL>
    1544. 

  1544. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1545. 

  1545. </UL>
    1546. 

  1546. 

  1547. <P><STRONG><a name="[105]"></a>UART_AdvFeatureConfig</STRONG> (Thumb, 248 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig))
    1548. 

  1548. <BR><BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1549. 

  1549. </UL>
    1550. 

  1550. 

  1551. <P><STRONG><a name="[107]"></a>UART_CheckIdleState</STRONG> (Thumb, 234 bytes, Stack size 16 bytes, stm32h7xx_hal_uart.o(i.UART_CheckIdleState))
    1552. 

  1552. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = UART_CheckIdleState &rArr; UART_WaitOnFlagUntilTimeout
    1553. 

  1553. </UL>
    1554. 

  1554. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1555. 

  1555. <LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
    1556. 

  1556. </UL>
    1557. 

  1557. <BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1558. 

  1558. </UL>
    1559. 

  1559. 

  1560. <P><STRONG><a name="[106]"></a>UART_SetConfig</STRONG> (Thumb, 1402 bytes, Stack size 72 bytes, stm32h7xx_hal_uart.o(i.UART_SetConfig))
    1561. 

  1561. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = UART_SetConfig &rArr; __aeabi_uldivmod
    1562. 

  1562. </UL>
    1563. 

  1563. <BR>[Calls]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL3ClockFreq
    1564. 

  1564. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL2ClockFreq
    1565. 

  1565. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetD3PCLK1Freq
    1566. 

  1566. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
    1567. 

  1567. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
    1568. 

  1568. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    1569. 

  1569. </UL>
    1570. 

  1570. <BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1571. 

  1571. </UL>
    1572. 

  1572. 

  1573. <P><STRONG><a name="[109]"></a>UART_WaitOnFlagUntilTimeout</STRONG> (Thumb, 172 bytes, Stack size 24 bytes, stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout))
    1574. 

  1574. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = UART_WaitOnFlagUntilTimeout
    1575. 

  1575. </UL>
    1576. 

  1576. <BR>[Calls]<UL><LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
    1577. 

  1577. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1578. 

  1578. </UL>
    1579. 

  1579. <BR>[Called By]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
    1580. 

  1580. <LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
    1581. 

  1581. </UL>
    1582. 

  1582. 

  1583. <P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.UsageFault_Handler))
    1584. 

  1584. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
    1585. 

  1585. </UL>
    1586. 

  1586. <P><STRONG><a name="[127]"></a>__0printf</STRONG> (Thumb, 22 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
    1587. 

  1587. <BR><BR>[Calls]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    1588. 

  1588. </UL>
    1589. 

  1589. 

  1590. <P><STRONG><a name="[16f]"></a>__1printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
    1591. 

  1591. 

  1592. <P><STRONG><a name="[b4]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf))
    1593. 

  1593. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __2printf
    1594. 

  1594. </UL>
    1595. 

  1595. <BR>[Called By]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    1596. 

  1596. <LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    1597. 

  1597. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    1598. 

  1598. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1599. 

  1599. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1600. 

  1600. </UL>
    1601. 

  1601. 

  1602. <P><STRONG><a name="[170]"></a>__c89printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
    1603. 

  1603. 

  1604. <P><STRONG><a name="[171]"></a>printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)
    1605. 

  1605. 

  1606. <P><STRONG><a name="[12c]"></a>__ARM_fpclassify</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, fpclassify.o(i.__ARM_fpclassify))
    1607. 

  1607. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __ARM_fpclassify
    1608. 

  1608. </UL>
    1609. 

  1609. <BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan
    1610. 

  1610. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1611. 

  1611. </UL>
    1612. 

  1612. 

  1613. <P><STRONG><a name="[122]"></a>__hardfp_asin</STRONG> (Thumb, 432 bytes, Stack size 72 bytes, asin.o(i.__hardfp_asin))
    1614. 

  1614. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = __hardfp_asin &rArr; sqrt
    1615. 

  1615. </UL>
    1616. 

  1616. <BR>[Calls]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__set_errno
    1617. 

  1617. <LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sqrt
    1618. 

  1618. <LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__kernel_poly
    1619. 

  1619. <LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ARM_fpclassify
    1620. 

  1620. <LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fabs
    1621. 

  1621. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_underflow
    1622. 

  1622. <LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_invalid
    1623. 

  1623. <LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_infnan
    1624. 

  1624. </UL>
    1625. 

  1625. <BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_DMP
    1626. 

  1626. </UL>
    1627. 

  1627. 

  1628. <P><STRONG><a name="[131]"></a>__hardfp_atan</STRONG> (Thumb, 402 bytes, Stack size 40 bytes, atan.o(i.__hardfp_atan))
    1629. 

  1629. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = __hardfp_atan &rArr; __ARM_fpclassify
    1630. 

  1630. </UL>
    1631. 

  1631. <BR>[Calls]<UL><LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__kernel_poly
    1632. 

  1632. <LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__ARM_fpclassify
    1633. 

  1633. <LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fabs
    1634. 

  1634. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_underflow
    1635. 

  1635. <LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_infnan
    1636. 

  1636. </UL>
    1637. 

  1637. <BR>[Called By]<UL><LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;atan
    1638. 

  1638. </UL>
    1639. 

  1639. 

  1640. <P><STRONG><a name="[123]"></a>__hardfp_atan2</STRONG> (Thumb, 392 bytes, Stack size 56 bytes, atan2.o(i.__hardfp_atan2))
    1641. 

  1641. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = __hardfp_atan2 &rArr; atan &rArr; __hardfp_atan &rArr; __ARM_fpclassify
    1642. 

  1642. </UL>
    1643. 

  1643. <BR>[Calls]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__set_errno
    1644. 

  1644. <LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fabs
    1645. 

  1645. <LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__mathlib_dbl_infnan2
    1646. 

  1646. <LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;atan
    1647. 

  1647. </UL>
    1648. 

  1648. <BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_DMP
    1649. 

  1649. </UL>
    1650. 

  1650. 

  1651. <P><STRONG><a name="[12e]"></a>__kernel_poly</STRONG> (Thumb, 112 bytes, Stack size 0 bytes, poly.o(i.__kernel_poly))
    1652. 

  1652. <BR><BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan
    1653. 

  1653. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1654. 

  1654. </UL>
    1655. 

  1655. 

  1656. <P><STRONG><a name="[129]"></a>__mathlib_dbl_infnan</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dunder.o(i.__mathlib_dbl_infnan))
    1657. 

  1657. <BR><BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan
    1658. 

  1658. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1659. 

  1659. </UL>
    1660. 

  1660. 

  1661. <P><STRONG><a name="[132]"></a>__mathlib_dbl_infnan2</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dunder.o(i.__mathlib_dbl_infnan2))
    1662. 

  1662. <BR><BR>[Called By]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan2
    1663. 

  1663. </UL>
    1664. 

  1664. 

  1665. <P><STRONG><a name="[12b]"></a>__mathlib_dbl_invalid</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, dunder.o(i.__mathlib_dbl_invalid))
    1666. 

  1666. <BR><BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1667. 

  1667. </UL>
    1668. 

  1668. 

  1669. <P><STRONG><a name="[12d]"></a>__mathlib_dbl_underflow</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, dunder.o(i.__mathlib_dbl_underflow))
    1670. 

  1670. <BR><BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan
    1671. 

  1671. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1672. 

  1672. </UL>
    1673. 

  1673. 

  1674. <P><STRONG><a name="[172]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    1675. 

  1675. 

  1676. <P><STRONG><a name="[173]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    1677. 

  1677. 

  1678. <P><STRONG><a name="[174]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    1679. 

  1679. 

  1680. <P><STRONG><a name="[12a]"></a>__set_errno</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, errno.o(i.__set_errno))
    1681. 

  1681. <BR><BR>[Called By]<UL><LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sqrt
    1682. 

  1682. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan2
    1683. 

  1683. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1684. 

  1684. </UL>
    1685. 

  1685. 

  1686. <P><STRONG><a name="[133]"></a>atan</STRONG> (Thumb, 16 bytes, Stack size 8 bytes, atan.o(i.atan))
    1687. 

  1687. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = atan &rArr; __hardfp_atan &rArr; __ARM_fpclassify
    1688. 

  1688. </UL>
    1689. 

  1689. <BR>[Calls]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan
    1690. 

  1690. </UL>
    1691. 

  1691. <BR>[Called By]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan2
    1692. 

  1692. </UL>
    1693. 

  1693. 

  1694. <P><STRONG><a name="[13b]"></a>dmp_enable_6x_lp_quat</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_enable_6x_lp_quat))
    1695. 

  1695. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_enable_6x_lp_quat &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1696. 

  1696. </UL>
    1697. 

  1697. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1698. 

  1698. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1699. 

  1699. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    1700. 

  1700. </UL>
    1701. 

  1701. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1702. 

  1702. </UL>
    1703. 

  1703. 

  1704. <P><STRONG><a name="[be]"></a>dmp_enable_feature</STRONG> (Thumb, 530 bytes, Stack size 24 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_enable_feature))
    1705. 

  1705. <BR><BR>[Stack]<UL><LI>Max Depth = 240<LI>Call Chain = dmp_enable_feature &rArr; dmp_set_tap_thresh &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1706. 

  1706. </UL>
    1707. 

  1707. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_time_multi
    1708. 

  1708. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_time
    1709. 

  1709. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_thresh
    1710. 

  1710. <LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_count
    1711. 

  1711. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_axes
    1712. 

  1712. <LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_shake_reject_timeout
    1713. 

  1713. <LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_shake_reject_time
    1714. 

  1714. <LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_shake_reject_thresh
    1715. 

  1715. <LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_lp_quat
    1716. 

  1716. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_gyro_cal
    1717. 

  1717. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_6x_lp_quat
    1718. 

  1718. <LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1719. 

  1719. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1720. 

  1720. </UL>
    1721. 

  1721. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1722. 

  1722. </UL>
    1723. 

  1723. 

  1724. <P><STRONG><a name="[13e]"></a>dmp_enable_gyro_cal</STRONG> (Thumb, 62 bytes, Stack size 24 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_enable_gyro_cal))
    1725. 

  1725. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = dmp_enable_gyro_cal &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1726. 

  1726. </UL>
    1727. 

  1727. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1728. 

  1728. </UL>
    1729. 

  1729. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1730. 

  1730. </UL>
    1731. 

  1731. 

  1732. <P><STRONG><a name="[147]"></a>dmp_enable_lp_quat</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_enable_lp_quat))
    1733. 

  1733. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_enable_lp_quat &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1734. 

  1734. </UL>
    1735. 

  1735. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1736. 

  1736. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1737. 

  1737. <LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    1738. 

  1738. </UL>
    1739. 

  1739. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1740. 

  1740. </UL>
    1741. 

  1741. 

  1742. <P><STRONG><a name="[bb]"></a>dmp_load_motion_driver_firmware</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_load_motion_driver_firmware))
    1743. 

  1743. <BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = dmp_load_motion_driver_firmware &rArr; mpu_load_firmware &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1744. 

  1744. </UL>
    1745. 

  1745. <BR>[Calls]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_load_firmware
    1746. 

  1746. </UL>
    1747. 

  1747. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1748. 

  1748. </UL>
    1749. 

  1749. 

  1750. <P><STRONG><a name="[121]"></a>dmp_read_fifo</STRONG> (Thumb, 456 bytes, Stack size 88 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_read_fifo))
    1751. 

  1751. <BR><BR>[Stack]<UL><LI>Max Depth = 272<LI>Call Chain = dmp_read_fifo &rArr; mpu_read_fifo_stream &rArr; mpu_reset_fifo &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1752. 

  1752. </UL>
    1753. 

  1753. <BR>[Calls]<UL><LI><a href="#[14a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;decode_gesture
    1754. 

  1754. <LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_tick_count
    1755. 

  1755. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1756. 

  1756. <LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_read_fifo_stream
    1757. 

  1757. </UL>
    1758. 

  1758. <BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_DMP
    1759. 

  1759. </UL>
    1760. 

  1760. 

  1761. <P><STRONG><a name="[14c]"></a>dmp_set_accel_bias</STRONG> (Thumb, 302 bytes, Stack size 48 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_accel_bias))
    1762. 

  1762. <BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = dmp_set_accel_bias &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1763. 

  1763. </UL>
    1764. 

  1764. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1765. 

  1765. <LI><a href="#[14d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_accel_sens
    1766. 

  1766. </UL>
    1767. 

  1767. <BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    1768. 

  1768. </UL>
    1769. 

  1769. 

  1770. <P><STRONG><a name="[bf]"></a>dmp_set_fifo_rate</STRONG> (Thumb, 96 bytes, Stack size 32 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_fifo_rate))
    1771. 

  1771. <BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = dmp_set_fifo_rate &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1772. 

  1772. </UL>
    1773. 

  1773. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1774. 

  1774. </UL>
    1775. 

  1775. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1776. 

  1776. </UL>
    1777. 

  1777. 

  1778. <P><STRONG><a name="[14e]"></a>dmp_set_gyro_bias</STRONG> (Thumb, 294 bytes, Stack size 24 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_gyro_bias))
    1779. 

  1779. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = dmp_set_gyro_bias &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1780. 

  1780. </UL>
    1781. 

  1781. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1782. 

  1782. </UL>
    1783. 

  1783. <BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    1784. 

  1784. </UL>
    1785. 

  1785. 

  1786. <P><STRONG><a name="[bd]"></a>dmp_set_orientation</STRONG> (Thumb, 290 bytes, Stack size 32 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_orientation))
    1787. 

  1787. <BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = dmp_set_orientation &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1788. 

  1788. </UL>
    1789. 

  1789. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1790. 

  1790. </UL>
    1791. 

  1791. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1792. 

  1792. </UL>
    1793. 

  1793. 

  1794. <P><STRONG><a name="[144]"></a>dmp_set_shake_reject_thresh</STRONG> (Thumb, 56 bytes, Stack size 24 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_shake_reject_thresh))
    1795. 

  1795. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = dmp_set_shake_reject_thresh &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1796. 

  1796. </UL>
    1797. 

  1797. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1798. 

  1798. </UL>
    1799. 

  1799. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1800. 

  1800. </UL>
    1801. 

  1801. 

  1802. <P><STRONG><a name="[145]"></a>dmp_set_shake_reject_time</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_shake_reject_time))
    1803. 

  1803. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_set_shake_reject_time &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1804. 

  1804. </UL>
    1805. 

  1805. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1806. 

  1806. </UL>
    1807. 

  1807. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1808. 

  1808. </UL>
    1809. 

  1809. 

  1810. <P><STRONG><a name="[146]"></a>dmp_set_shake_reject_timeout</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_shake_reject_timeout))
    1811. 

  1811. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_set_shake_reject_timeout &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1812. 

  1812. </UL>
    1813. 

  1813. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1814. 

  1814. </UL>
    1815. 

  1815. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1816. 

  1816. </UL>
    1817. 

  1817. 

  1818. <P><STRONG><a name="[140]"></a>dmp_set_tap_axes</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_tap_axes))
    1819. 

  1819. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_set_tap_axes &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1820. 

  1820. </UL>
    1821. 

  1821. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1822. 

  1822. </UL>
    1823. 

  1823. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1824. 

  1824. </UL>
    1825. 

  1825. 

  1826. <P><STRONG><a name="[141]"></a>dmp_set_tap_count</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_tap_count))
    1827. 

  1827. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_set_tap_count &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1828. 

  1828. </UL>
    1829. 

  1829. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1830. 

  1830. </UL>
    1831. 

  1831. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1832. 

  1832. </UL>
    1833. 

  1833. 

  1834. <P><STRONG><a name="[13f]"></a>dmp_set_tap_thresh</STRONG> (Thumb, 412 bytes, Stack size 40 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_tap_thresh))
    1835. 

  1835. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = dmp_set_tap_thresh &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1836. 

  1836. </UL>
    1837. 

  1837. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1838. 

  1838. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_accel_fsr
    1839. 

  1839. </UL>
    1840. 

  1840. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1841. 

  1841. </UL>
    1842. 

  1842. 

  1843. <P><STRONG><a name="[142]"></a>dmp_set_tap_time</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_tap_time))
    1844. 

  1844. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_set_tap_time &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1845. 

  1845. </UL>
    1846. 

  1846. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1847. 

  1847. </UL>
    1848. 

  1848. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1849. 

  1849. </UL>
    1850. 

  1850. 

  1851. <P><STRONG><a name="[143]"></a>dmp_set_tap_time_multi</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, inv_mpu_dmp_motion_driver.o(i.dmp_set_tap_time_multi))
    1852. 

  1852. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = dmp_set_tap_time_multi &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1853. 

  1853. </UL>
    1854. 

  1854. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1855. 

  1855. </UL>
    1856. 

  1856. <BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    1857. 

  1857. </UL>
    1858. 

  1858. 

  1859. <P><STRONG><a name="[12f]"></a>fabs</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, fabs.o(i.fabs))
    1860. 

  1860. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = fabs
    1861. 

  1861. </UL>
    1862. 

  1862. <BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan
    1863. 

  1863. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_atan2
    1864. 

  1864. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    1865. 

  1865. </UL>
    1866. 

  1866. 

  1867. <P><STRONG><a name="[9a]"></a>fputc</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, main.o(i.fputc))
    1868. 

  1868. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = fputc &rArr; HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout
    1869. 

  1869. </UL>
    1870. 

  1870. <BR>[Calls]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
    1871. 

  1871. </UL>
    1872. 

  1872. <BR>[Address Reference Count : 1]<UL><LI> printfa.o(i.__0printf)
    1873. 

  1873. </UL>
    1874. 

  1874. <P><STRONG><a name="[14b]"></a>get_tick_count</STRONG> (Thumb, 14 bytes, Stack size 8 bytes, mpu6050.o(i.get_tick_count))
    1875. 

  1875. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = get_tick_count
    1876. 

  1876. </UL>
    1877. 

  1877. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    1878. 

  1878. </UL>
    1879. 

  1879. <BR>[Called By]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_read_fifo
    1880. 

  1880. </UL>
    1881. 

  1881. 

  1882. <P><STRONG><a name="[96]"></a>main</STRONG> (Thumb, 752 bytes, Stack size 224 bytes, main.o(i.main))
    1883. 

  1883. <BR><BR>[Stack]<UL><LI>Max Depth = 632<LI>Call Chain = main &rArr; DMP_Init &rArr; run_self_test &rArr; mpu_run_self_test &rArr; mpu_set_dmp_state &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1884. 

  1884. </UL>
    1885. 

  1885. <BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART2_UART_Init
    1886. 

  1886. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1887. 

  1887. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1888. 

  1888. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM1_Init
    1889. 

  1889. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_QUADSPI_Init
    1890. 

  1890. <LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C3_Init
    1891. 

  1891. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C2_Init
    1892. 

  1892. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_I2C1_Init
    1893. 

  1893. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    1894. 

  1894. <LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_ADC1_Init
    1895. 

  1895. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_Init
    1896. 

  1896. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1897. 

  1897. <LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    1898. 

  1898. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1899. 

  1899. <LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Read_DMP
    1900. 

  1900. <LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MPU_Get_Gyroscope
    1901. 

  1901. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1902. 

  1902. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
    1903. 

  1903. </UL>
    1904. 

  1904. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    1905. 

  1905. </UL>
    1906. 

  1906. <P><STRONG><a name="[b6]"></a>mpu_configure_fifo</STRONG> (Thumb, 106 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_configure_fifo))
    1907. 

  1907. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1908. 

  1908. </UL>
    1909. 

  1909. <BR>[Calls]<UL><LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1910. 

  1910. <LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_int_enable
    1911. 

  1911. </UL>
    1912. 

  1912. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    1913. 

  1913. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_lp_accel_mode
    1914. 

  1914. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    1915. 

  1915. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1916. 

  1916. </UL>
    1917. 

  1917. 

  1918. <P><STRONG><a name="[ba]"></a>mpu_get_accel_fsr</STRONG> (Thumb, 72 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_accel_fsr))
    1919. 

  1919. <BR><BR>[Called By]<UL><LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_thresh
    1920. 

  1920. <LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    1921. 

  1921. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1922. 

  1922. </UL>
    1923. 

  1923. 

  1924. <P><STRONG><a name="[14d]"></a>mpu_get_accel_sens</STRONG> (Thumb, 78 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_accel_sens))
    1925. 

  1925. <BR><BR>[Called By]<UL><LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_accel_bias
    1926. 

  1926. <LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    1927. 

  1927. </UL>
    1928. 

  1928. 

  1929. <P><STRONG><a name="[15c]"></a>mpu_get_fifo_config</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_fifo_config))
    1930. 

  1930. <BR><BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    1931. 

  1931. </UL>
    1932. 

  1932. 

  1933. <P><STRONG><a name="[b9]"></a>mpu_get_gyro_fsr</STRONG> (Thumb, 64 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_gyro_fsr))
    1934. 

  1934. <BR><BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    1935. 

  1935. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1936. 

  1936. </UL>
    1937. 

  1937. 

  1938. <P><STRONG><a name="[15d]"></a>mpu_get_gyro_sens</STRONG> (Thumb, 74 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_gyro_sens))
    1939. 

  1939. <BR><BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    1940. 

  1940. </UL>
    1941. 

  1941. 

  1942. <P><STRONG><a name="[15b]"></a>mpu_get_lpf</STRONG> (Thumb, 74 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_lpf))
    1943. 

  1943. <BR><BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    1944. 

  1944. </UL>
    1945. 

  1945. 

  1946. <P><STRONG><a name="[b8]"></a>mpu_get_sample_rate</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, inv_mpu.o(i.mpu_get_sample_rate))
    1947. 

  1947. <BR><BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    1948. 

  1948. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1949. 

  1949. </UL>
    1950. 

  1950. 

  1951. <P><STRONG><a name="[b3]"></a>mpu_init</STRONG> (Thumb, 418 bytes, Stack size 24 bytes, inv_mpu.o(i.mpu_init))
    1952. 

  1952. <BR><BR>[Stack]<UL><LI>Max Depth = 240<LI>Call Chain = mpu_init &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1953. 

  1953. </UL>
    1954. 

  1954. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    1955. 

  1955. <LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    1956. 

  1956. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    1957. 

  1957. <LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sensors
    1958. 

  1958. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    1959. 

  1959. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_lpf
    1960. 

  1960. <LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_gyro_fsr
    1961. 

  1961. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_bypass
    1962. 

  1962. <LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_accel_fsr
    1963. 

  1963. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_configure_fifo
    1964. 

  1964. <LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
    1965. 

  1965. </UL>
    1966. 

  1966. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    1967. 

  1967. </UL>
    1968. 

  1968. 

  1969. <P><STRONG><a name="[148]"></a>mpu_load_firmware</STRONG> (Thumb, 180 bytes, Stack size 48 bytes, inv_mpu.o(i.mpu_load_firmware))
    1970. 

  1970. <BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = mpu_load_firmware &rArr; mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1971. 

  1971. </UL>
    1972. 

  1972. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    1973. 

  1973. <LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_write_mem
    1974. 

  1974. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_read_mem
    1975. 

  1975. <LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;memcmp
    1976. 

  1976. </UL>
    1977. 

  1977. <BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_load_motion_driver_firmware
    1978. 

  1978. </UL>
    1979. 

  1979. 

  1980. <P><STRONG><a name="[158]"></a>mpu_lp_accel_mode</STRONG> (Thumb, 218 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_lp_accel_mode))
    1981. 

  1981. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1982. 

  1982. </UL>
    1983. 

  1983. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    1984. 

  1984. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_lpf
    1985. 

  1985. <LI><a href="#[159]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_int_latched
    1986. 

  1986. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_configure_fifo
    1987. 

  1987. </UL>
    1988. 

  1988. <BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    1989. 

  1989. </UL>
    1990. 

  1990. 

  1991. <P><STRONG><a name="[149]"></a>mpu_read_fifo_stream</STRONG> (Thumb, 186 bytes, Stack size 24 bytes, inv_mpu.o(i.mpu_read_fifo_stream))
    1992. 

  1992. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = mpu_read_fifo_stream &rArr; mpu_reset_fifo &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    1993. 

  1993. </UL>
    1994. 

  1994. <BR>[Calls]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    1995. 

  1995. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    1996. 

  1996. </UL>
    1997. 

  1997. <BR>[Called By]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_read_fifo
    1998. 

  1998. </UL>
    1999. 

  1999. 

  2000. <P><STRONG><a name="[156]"></a>mpu_read_mem</STRONG> (Thumb, 122 bytes, Stack size 24 bytes, inv_mpu.o(i.mpu_read_mem))
    2001. 

  2001. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = mpu_read_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2002. 

  2002. </UL>
    2003. 

  2003. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2004. 

  2004. <LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    2005. 

  2005. </UL>
    2006. 

  2006. <BR>[Called By]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_load_firmware
    2007. 

  2007. </UL>
    2008. 

  2008. 

  2009. <P><STRONG><a name="[13d]"></a>mpu_reset_fifo</STRONG> (Thumb, 450 bytes, Stack size 8 bytes, inv_mpu.o(i.mpu_reset_fifo))
    2010. 

  2010. <BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = mpu_reset_fifo &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2011. 

  2011. </UL>
    2012. 

  2012. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2013. 

  2013. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    2014. 

  2014. </UL>
    2015. 

  2015. <BR>[Called By]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_read_fifo
    2016. 

  2016. <LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_lp_quat
    2017. 

  2017. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    2018. 

  2018. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_6x_lp_quat
    2019. 

  2019. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    2020. 

  2020. <LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_read_fifo_stream
    2021. 

  2021. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_configure_fifo
    2022. 

  2022. </UL>
    2023. 

  2023. 

  2024. <P><STRONG><a name="[15a]"></a>mpu_run_self_test</STRONG> (Thumb, 278 bytes, Stack size 88 bytes, inv_mpu.o(i.mpu_run_self_test))
    2025. 

  2025. <BR><BR>[Stack]<UL><LI>Max Depth = 320<LI>Call Chain = mpu_run_self_test &rArr; mpu_set_dmp_state &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2026. 

  2026. </UL>
    2027. 

  2027. <BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sensors
    2028. 

  2028. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    2029. 

  2029. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_lpf
    2030. 

  2030. <LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_gyro_fsr
    2031. 

  2031. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    2032. 

  2032. <LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_accel_fsr
    2033. 

  2033. <LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_sample_rate
    2034. 

  2034. <LI><a href="#[15b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_lpf
    2035. 

  2035. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_gyro_fsr
    2036. 

  2036. <LI><a href="#[15c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_fifo_config
    2037. 

  2037. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_accel_fsr
    2038. 

  2038. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_configure_fifo
    2039. 

  2039. <LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;gyro_self_test
    2040. 

  2040. <LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_st_biases
    2041. 

  2041. <LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;accel_self_test
    2042. 

  2042. </UL>
    2043. 

  2043. <BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    2044. 

  2044. </UL>
    2045. 

  2045. 

  2046. <P><STRONG><a name="[153]"></a>mpu_set_accel_fsr</STRONG> (Thumb, 126 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_accel_fsr))
    2047. 

  2047. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = mpu_set_accel_fsr &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2048. 

  2048. </UL>
    2049. 

  2049. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2050. 

  2050. </UL>
    2051. 

  2051. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2052. 

  2052. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    2053. 

  2053. </UL>
    2054. 

  2054. 

  2055. <P><STRONG><a name="[155]"></a>mpu_set_bypass</STRONG> (Thumb, 328 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_bypass))
    2056. 

  2056. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = mpu_set_bypass &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2057. 

  2057. </UL>
    2058. 

  2058. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2059. 

  2059. <LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    2060. 

  2060. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    2061. 

  2061. </UL>
    2062. 

  2062. <BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    2063. 

  2063. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    2064. 

  2064. </UL>
    2065. 

  2065. 

  2066. <P><STRONG><a name="[c1]"></a>mpu_set_dmp_state</STRONG> (Thumb, 138 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_dmp_state))
    2067. 

  2067. <BR><BR>[Stack]<UL><LI>Max Depth = 232<LI>Call Chain = mpu_set_dmp_state &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2068. 

  2068. </UL>
    2069. 

  2069. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2070. 

  2070. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    2071. 

  2071. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_bypass
    2072. 

  2072. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_reset_fifo
    2073. 

  2073. <LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;set_int_enable
    2074. 

  2074. </UL>
    2075. 

  2075. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2076. 

  2076. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    2077. 

  2077. </UL>
    2078. 

  2078. 

  2079. <P><STRONG><a name="[152]"></a>mpu_set_gyro_fsr</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_gyro_fsr))
    2080. 

  2080. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = mpu_set_gyro_fsr &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2081. 

  2081. </UL>
    2082. 

  2082. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2083. 

  2083. </UL>
    2084. 

  2084. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2085. 

  2085. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    2086. 

  2086. </UL>
    2087. 

  2087. 

  2088. <P><STRONG><a name="[159]"></a>mpu_set_int_latched</STRONG> (Thumb, 102 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_int_latched))
    2089. 

  2089. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = mpu_set_int_latched &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2090. 

  2090. </UL>
    2091. 

  2091. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2092. 

  2092. </UL>
    2093. 

  2093. <BR>[Called By]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sensors
    2094. 

  2094. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_lp_accel_mode
    2095. 

  2095. </UL>
    2096. 

  2096. 

  2097. <P><STRONG><a name="[154]"></a>mpu_set_lpf</STRONG> (Thumb, 126 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_lpf))
    2098. 

  2098. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = mpu_set_lpf &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2099. 

  2099. </UL>
    2100. 

  2100. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2101. 

  2101. </UL>
    2102. 

  2102. <BR>[Called By]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_sample_rate
    2103. 

  2103. <LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2104. 

  2104. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_lp_accel_mode
    2105. 

  2105. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    2106. 

  2106. </UL>
    2107. 

  2107. 

  2108. <P><STRONG><a name="[b7]"></a>mpu_set_sample_rate</STRONG> (Thumb, 152 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_sample_rate))
    2109. 

  2109. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2110. 

  2110. </UL>
    2111. 

  2111. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2112. 

  2112. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_lpf
    2113. 

  2113. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_lp_accel_mode
    2114. 

  2114. </UL>
    2115. 

  2115. <BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    2116. 

  2116. <LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2117. 

  2117. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    2118. 

  2118. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    2119. 

  2119. </UL>
    2120. 

  2120. 

  2121. <P><STRONG><a name="[b5]"></a>mpu_set_sensors</STRONG> (Thumb, 202 bytes, Stack size 16 bytes, inv_mpu.o(i.mpu_set_sensors))
    2122. 

  2122. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = mpu_set_sensors &rArr; mpu_set_int_latched &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2123. 

  2123. </UL>
    2124. 

  2124. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2125. 

  2125. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    2126. 

  2126. <LI><a href="#[159]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_int_latched
    2127. 

  2127. </UL>
    2128. 

  2128. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2129. 

  2129. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_init
    2130. 

  2130. <LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    2131. 

  2131. </UL>
    2132. 

  2132. 

  2133. <P><STRONG><a name="[13c]"></a>mpu_write_mem</STRONG> (Thumb, 122 bytes, Stack size 24 bytes, inv_mpu.o(i.mpu_write_mem))
    2134. 

  2134. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = mpu_write_mem &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2135. 

  2135. </UL>
    2136. 

  2136. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2137. 

  2137. </UL>
    2138. 

  2138. <BR>[Called By]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_time_multi
    2139. 

  2139. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_time
    2140. 

  2140. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_thresh
    2141. 

  2141. <LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_count
    2142. 

  2142. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_tap_axes
    2143. 

  2143. <LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_shake_reject_timeout
    2144. 

  2144. <LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_shake_reject_time
    2145. 

  2145. <LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_shake_reject_thresh
    2146. 

  2146. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_orientation
    2147. 

  2147. <LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_gyro_bias
    2148. 

  2148. <LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_fifo_rate
    2149. 

  2149. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_accel_bias
    2150. 

  2150. <LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_lp_quat
    2151. 

  2151. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_gyro_cal
    2152. 

  2152. <LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_feature
    2153. 

  2153. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_enable_6x_lp_quat
    2154. 

  2154. <LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_load_firmware
    2155. 

  2155. </UL>
    2156. 

  2156. 

  2157. <P><STRONG><a name="[15e]"></a>send_packet</STRONG> (Thumb, 348 bytes, Stack size 40 bytes, mpu6050.o(i.send_packet))
    2158. 

  2158. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = send_packet
    2159. 

  2159. </UL>
    2160. 

  2160. <BR>[Calls]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    2161. 

  2161. </UL>
    2162. 

  2162. <BR>[Called By]<UL><LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;run_self_test
    2163. 

  2163. </UL>
    2164. 

  2164. 

  2165. <P><STRONG><a name="[130]"></a>sqrt</STRONG> (Thumb, 106 bytes, Stack size 24 bytes, sqrt.o(i.sqrt))
    2166. 

  2166. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = sqrt
    2167. 

  2167. </UL>
    2168. 

  2168. <BR>[Calls]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__set_errno
    2169. 

  2169. </UL>
    2170. 

  2170. <BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__hardfp_asin
    2171. 

  2171. </UL>
    2172. 

  2172. <P>
    2173. 

  2173. <H3>
    2174. 

  2174. Local Symbols
    2175. 

  2175. </H3>
    2176. 

  2176. <P><STRONG><a name="[139]"></a>accel_self_test</STRONG> (Thumb, 184 bytes, Stack size 40 bytes, inv_mpu.o(i.accel_self_test))
    2177. 

  2177. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = accel_self_test &rArr; get_accel_prod_shift &rArr; IIC_Read_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2178. 

  2178. </UL>
    2179. 

  2179. <BR>[Calls]<UL><LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;get_accel_prod_shift
    2180. 

  2180. </UL>
    2181. 

  2181. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2182. 

  2182. </UL>
    2183. 

  2183. 

  2184. <P><STRONG><a name="[13a]"></a>get_accel_prod_shift</STRONG> (Thumb, 190 bytes, Stack size 24 bytes, inv_mpu.o(i.get_accel_prod_shift))
    2185. 

  2185. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = get_accel_prod_shift &rArr; IIC_Read_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2186. 

  2186. </UL>
    2187. 

  2187. <BR>[Calls]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    2188. 

  2188. </UL>
    2189. 

  2189. <BR>[Called By]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;accel_self_test
    2190. 

  2190. </UL>
    2191. 

  2191. 

  2192. <P><STRONG><a name="[14f]"></a>get_st_biases</STRONG> (Thumb, 1128 bytes, Stack size 64 bytes, inv_mpu.o(i.get_st_biases))
    2193. 

  2193. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = get_st_biases &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2194. 

  2194. </UL>
    2195. 

  2195. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2196. 

  2196. <LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    2197. 

  2197. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    2198. 

  2198. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ldivmod
    2199. 

  2199. </UL>
    2200. 

  2200. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2201. 

  2201. </UL>
    2202. 

  2202. 

  2203. <P><STRONG><a name="[150]"></a>gyro_self_test</STRONG> (Thumb, 266 bytes, Stack size 40 bytes, inv_mpu.o(i.gyro_self_test))
    2204. 

  2204. <BR><BR>[Stack]<UL><LI>Max Depth = 192<LI>Call Chain = gyro_self_test &rArr; IIC_Read_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2205. 

  2205. </UL>
    2206. 

  2206. <BR>[Calls]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Read_Len
    2207. 

  2207. </UL>
    2208. 

  2208. <BR>[Called By]<UL><LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2209. 

  2209. </UL>
    2210. 

  2210. 

  2211. <P><STRONG><a name="[151]"></a>set_int_enable</STRONG> (Thumb, 138 bytes, Stack size 16 bytes, inv_mpu.o(i.set_int_enable))
    2212. 

  2212. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2213. 

  2213. </UL>
    2214. 

  2214. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;IIC_Write_Len
    2215. 

  2215. </UL>
    2216. 

  2216. <BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_set_dmp_state
    2217. 

  2217. <LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_configure_fifo
    2218. 

  2218. </UL>
    2219. 

  2219. 

  2220. <P><STRONG><a name="[14a]"></a>decode_gesture</STRONG> (Thumb, 94 bytes, Stack size 24 bytes, inv_mpu_dmp_motion_driver.o(i.decode_gesture))
    2221. 

  2221. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = decode_gesture
    2222. 

  2222. </UL>
    2223. 

  2223. <BR>[Called By]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_read_fifo
    2224. 

  2224. </UL>
    2225. 

  2225. 

  2226. <P><STRONG><a name="[99]"></a>gyro_data_ready_cb</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, mpu6050.o(i.gyro_data_ready_cb))
    2227. 

  2227. <BR>[Address Reference Count : 1]<UL><LI> mpu6050.o(i.DMP_Init)
    2228. 

  2228. </UL>
    2229. 

  2229. <P><STRONG><a name="[bc]"></a>inv_row_2_scale</STRONG> (Thumb, 78 bytes, Stack size 0 bytes, mpu6050.o(i.inv_row_2_scale))
    2230. 

  2230. <BR><BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    2231. 

  2231. </UL>
    2232. 

  2232. 

  2233. <P><STRONG><a name="[c0]"></a>run_self_test</STRONG> (Thumb, 174 bytes, Stack size 48 bytes, mpu6050.o(i.run_self_test))
    2234. 

  2234. <BR><BR>[Stack]<UL><LI>Max Depth = 368<LI>Call Chain = run_self_test &rArr; mpu_run_self_test &rArr; mpu_set_dmp_state &rArr; mpu_set_sample_rate &rArr; mpu_lp_accel_mode &rArr; mpu_configure_fifo &rArr; set_int_enable &rArr; IIC_Write_Len &rArr; HAL_I2C_Master_Transmit &rArr; I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2235. 

  2235. </UL>
    2236. 

  2236. <BR>[Calls]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_gyro_bias
    2237. 

  2237. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;dmp_set_accel_bias
    2238. 

  2238. <LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_run_self_test
    2239. 

  2239. <LI><a href="#[15d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_gyro_sens
    2240. 

  2240. <LI><a href="#[14d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mpu_get_accel_sens
    2241. 

  2241. <LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;send_packet
    2242. 

  2242. </UL>
    2243. 

  2243. <BR>[Called By]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMP_Init
    2244. 

  2244. </UL>
    2245. 

  2245. 

  2246. <P><STRONG><a name="[c7]"></a>LL_ADC_INJ_IsConversionOngoing</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_adc.o(i.LL_ADC_INJ_IsConversionOngoing))
    2247. 

  2247. <BR><BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2248. 

  2248. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2249. 

  2249. </UL>
    2250. 

  2250. 

  2251. <P><STRONG><a name="[c9]"></a>LL_ADC_IsEnabled</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_adc.o(i.LL_ADC_IsEnabled))
    2252. 

  2252. <BR><BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2253. 

  2253. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2254. 

  2254. </UL>
    2255. 

  2255. 

  2256. <P><STRONG><a name="[cd]"></a>LL_ADC_IsInternalRegulatorEnabled</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_adc.o(i.LL_ADC_IsInternalRegulatorEnabled))
    2257. 

  2257. <BR><BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2258. 

  2258. </UL>
    2259. 

  2259. 

  2260. <P><STRONG><a name="[c6]"></a>LL_ADC_REG_IsConversionOngoing</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_adc.o(i.LL_ADC_REG_IsConversionOngoing))
    2261. 

  2261. <BR><BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_Init
    2262. 

  2262. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2263. 

  2263. </UL>
    2264. 

  2264. 

  2265. <P><STRONG><a name="[c8]"></a>LL_ADC_SetChannelSamplingTime</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, stm32h7xx_hal_adc.o(i.LL_ADC_SetChannelSamplingTime))
    2266. 

  2266. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = LL_ADC_SetChannelSamplingTime
    2267. 

  2267. </UL>
    2268. 

  2268. <BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2269. 

  2269. </UL>
    2270. 

  2270. 

  2271. <P><STRONG><a name="[ca]"></a>LL_ADC_SetCommonPathInternalCh</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32h7xx_hal_adc.o(i.LL_ADC_SetCommonPathInternalCh))
    2272. 

  2272. <BR><BR>[Called By]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADC_ConfigChannel
    2273. 

  2273. </UL>
    2274. 

  2274. 

  2275. <P><STRONG><a name="[c4]"></a>LL_ADC_IsEnabled</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_adc_ex.o(i.LL_ADC_IsEnabled))
    2276. 

  2276. <BR><BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_MultiModeConfigChannel
    2277. 

  2277. </UL>
    2278. 

  2278. 

  2279. <P><STRONG><a name="[c3]"></a>LL_ADC_REG_IsConversionOngoing</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_adc_ex.o(i.LL_ADC_REG_IsConversionOngoing))
    2280. 

  2280. <BR><BR>[Called By]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_ADCEx_MultiModeConfigChannel
    2281. 

  2281. </UL>
    2282. 

  2282. 

  2283. <P><STRONG><a name="[f0]"></a>RCCEx_PLL2_Config</STRONG> (Thumb, 350 bytes, Stack size 24 bytes, stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL2_Config))
    2284. 

  2284. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCCEx_PLL2_Config
    2285. 

  2285. </UL>
    2286. 

  2286. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2287. 

  2287. </UL>
    2288. 

  2288. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    2289. 

  2289. </UL>
    2290. 

  2290. 

  2291. <P><STRONG><a name="[f1]"></a>RCCEx_PLL3_Config</STRONG> (Thumb, 350 bytes, Stack size 24 bytes, stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL3_Config))
    2292. 

  2292. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = RCCEx_PLL3_Config
    2293. 

  2293. </UL>
    2294. 

  2294. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2295. 

  2295. </UL>
    2296. 

  2296. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
    2297. 

  2297. </UL>
    2298. 

  2298. 

  2299. <P><STRONG><a name="[e4]"></a>__NVIC_GetPriorityGrouping</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_cortex.o(i.__NVIC_GetPriorityGrouping))
    2300. 

  2300. <BR><BR>[Called By]<UL><LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2301. 

  2301. </UL>
    2302. 

  2302. 

  2303. <P><STRONG><a name="[e5]"></a>__NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32h7xx_hal_cortex.o(i.__NVIC_SetPriority))
    2304. 

  2304. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
    2305. 

  2305. </UL>
    2306. 

  2306. <BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
    2307. 

  2307. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2308. 

  2308. </UL>
    2309. 

  2309. 

  2310. <P><STRONG><a name="[10b]"></a>I2C_Flush_TXDR</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, stm32h7xx_hal_i2c.o(i.I2C_Flush_TXDR))
    2311. 

  2311. <BR><BR>[Called By]<UL><LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsErrorOccurred
    2312. 

  2312. </UL>
    2313. 

  2313. 

  2314. <P><STRONG><a name="[10a]"></a>I2C_IsErrorOccurred</STRONG> (Thumb, 300 bytes, Stack size 48 bytes, stm32h7xx_hal_i2c.o(i.I2C_IsErrorOccurred))
    2315. 

  2315. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = I2C_IsErrorOccurred
    2316. 

  2316. </UL>
    2317. 

  2317. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2318. 

  2318. <LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_Flush_TXDR
    2319. 

  2319. </UL>
    2320. 

  2320. <BR>[Called By]<UL><LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnTXISFlagUntilTimeout
    2321. 

  2321. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnSTOPFlagUntilTimeout
    2322. 

  2322. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnRXNEFlagUntilTimeout
    2323. 

  2323. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_WaitOnFlagUntilTimeout
    2324. 

  2324. </UL>
    2325. 

  2325. 

  2326. <P><STRONG><a name="[d8]"></a>I2C_TransferConfig</STRONG> (Thumb, 56 bytes, Stack size 20 bytes, stm32h7xx_hal_i2c.o(i.I2C_TransferConfig))
    2327. 

  2327. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = I2C_TransferConfig
    2328. 

  2328. </UL>
    2329. 

  2329. <BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    2330. 

  2330. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Receive
    2331. 

  2331. </UL>
    2332. 

  2332. 

  2333. <P><STRONG><a name="[d7]"></a>I2C_WaitOnFlagUntilTimeout</STRONG> (Thumb, 130 bytes, Stack size 24 bytes, stm32h7xx_hal_i2c.o(i.I2C_WaitOnFlagUntilTimeout))
    2334. 

  2334. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = I2C_WaitOnFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2335. 

  2335. </UL>
    2336. 

  2336. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2337. 

  2337. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsErrorOccurred
    2338. 

  2338. </UL>
    2339. 

  2339. <BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    2340. 

  2340. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Receive
    2341. 

  2341. </UL>
    2342. 

  2342. 

  2343. <P><STRONG><a name="[d9]"></a>I2C_WaitOnRXNEFlagUntilTimeout</STRONG> (Thumb, 192 bytes, Stack size 24 bytes, stm32h7xx_hal_i2c.o(i.I2C_WaitOnRXNEFlagUntilTimeout))
    2344. 

  2344. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = I2C_WaitOnRXNEFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2345. 

  2345. </UL>
    2346. 

  2346. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2347. 

  2347. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsErrorOccurred
    2348. 

  2348. </UL>
    2349. 

  2349. <BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Receive
    2350. 

  2350. </UL>
    2351. 

  2351. 

  2352. <P><STRONG><a name="[da]"></a>I2C_WaitOnSTOPFlagUntilTimeout</STRONG> (Thumb, 96 bytes, Stack size 16 bytes, stm32h7xx_hal_i2c.o(i.I2C_WaitOnSTOPFlagUntilTimeout))
    2353. 

  2353. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = I2C_WaitOnSTOPFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2354. 

  2354. </UL>
    2355. 

  2355. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2356. 

  2356. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsErrorOccurred
    2357. 

  2357. </UL>
    2358. 

  2358. <BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    2359. 

  2359. <LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Receive
    2360. 

  2360. </UL>
    2361. 

  2361. 

  2362. <P><STRONG><a name="[dc]"></a>I2C_WaitOnTXISFlagUntilTimeout</STRONG> (Thumb, 100 bytes, Stack size 16 bytes, stm32h7xx_hal_i2c.o(i.I2C_WaitOnTXISFlagUntilTimeout))
    2363. 

  2363. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = I2C_WaitOnTXISFlagUntilTimeout &rArr; I2C_IsErrorOccurred
    2364. 

  2364. </UL>
    2365. 

  2365. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2366. 

  2366. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;I2C_IsErrorOccurred
    2367. 

  2367. </UL>
    2368. 

  2368. <BR>[Called By]<UL><LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_I2C_Master_Transmit
    2369. 

  2369. </UL>
    2370. 

  2370. 

  2371. <P><STRONG><a name="[ea]"></a>QSPI_WaitFlagStateUntilTimeout</STRONG> (Thumb, 76 bytes, Stack size 24 bytes, stm32h7xx_hal_qspi.o(i.QSPI_WaitFlagStateUntilTimeout))
    2372. 

  2372. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = QSPI_WaitFlagStateUntilTimeout
    2373. 

  2373. </UL>
    2374. 

  2374. <BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    2375. 

  2375. </UL>
    2376. 

  2376. <BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_QSPI_Init
    2377. 

  2377. </UL>
    2378. 

  2378. 

  2379. <P><STRONG><a name="[f7]"></a>TIM_OC1_SetConfig</STRONG> (Thumb, 146 bytes, Stack size 12 bytes, stm32h7xx_hal_tim.o(i.TIM_OC1_SetConfig))
    2380. 

  2380. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC1_SetConfig
    2381. 

  2381. </UL>
    2382. 

  2382. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2383. 

  2383. </UL>
    2384. 

  2384. 

  2385. <P><STRONG><a name="[f9]"></a>TIM_OC3_SetConfig</STRONG> (Thumb, 154 bytes, Stack size 12 bytes, stm32h7xx_hal_tim.o(i.TIM_OC3_SetConfig))
    2386. 

  2386. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC3_SetConfig
    2387. 

  2387. </UL>
    2388. 

  2388. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2389. 

  2389. </UL>
    2390. 

  2390. 

  2391. <P><STRONG><a name="[fa]"></a>TIM_OC4_SetConfig</STRONG> (Thumb, 92 bytes, Stack size 12 bytes, stm32h7xx_hal_tim.o(i.TIM_OC4_SetConfig))
    2392. 

  2392. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC4_SetConfig
    2393. 

  2393. </UL>
    2394. 

  2394. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2395. 

  2395. </UL>
    2396. 

  2396. 

  2397. <P><STRONG><a name="[fb]"></a>TIM_OC5_SetConfig</STRONG> (Thumb, 86 bytes, Stack size 12 bytes, stm32h7xx_hal_tim.o(i.TIM_OC5_SetConfig))
    2398. 

  2398. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC5_SetConfig
    2399. 

  2399. </UL>
    2400. 

  2400. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2401. 

  2401. </UL>
    2402. 

  2402. 

  2403. <P><STRONG><a name="[fc]"></a>TIM_OC6_SetConfig</STRONG> (Thumb, 88 bytes, Stack size 12 bytes, stm32h7xx_hal_tim.o(i.TIM_OC6_SetConfig))
    2404. 

  2404. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC6_SetConfig
    2405. 

  2405. </UL>
    2406. 

  2406. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2407. 

  2407. </UL>
    2408. 

  2408. 

  2409. <P><STRONG><a name="[126]"></a>UART_EndRxTransfer</STRONG> (Thumb, 104 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.UART_EndRxTransfer))
    2410. 

  2410. <BR><BR>[Called By]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
    2411. 

  2411. </UL>
    2412. 

  2412. 

  2413. <P><STRONG><a name="[101]"></a>UARTEx_SetNbDataToProcess</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess))
    2414. 

  2414. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UARTEx_SetNbDataToProcess
    2415. 

  2415. </UL>
    2416. 

  2416. <BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetTxFifoThreshold
    2417. 

  2417. <LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetRxFifoThreshold
    2418. 

  2418. </UL>
    2419. 

  2419. 

  2420. <P><STRONG><a name="[134]"></a>_fp_digits</STRONG> (Thumb, 366 bytes, Stack size 64 bytes, printfa.o(i._fp_digits), UNUSED)
    2421. 

  2421. <BR><BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    2422. 

  2422. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_ddiv
    2423. 

  2423. <LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    2424. 

  2424. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2ulz
    2425. 

  2425. <LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdrcmple
    2426. 

  2426. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    2427. 

  2427. </UL>
    2428. 

  2428. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    2429. 

  2429. </UL>
    2430. 

  2430. 

  2431. <P><STRONG><a name="[128]"></a>_printf_core</STRONG> (Thumb, 1704 bytes, Stack size 136 bytes, printfa.o(i._printf_core), UNUSED)
    2432. 

  2432. <BR><BR>[Calls]<UL><LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uidivmod
    2433. 

  2433. <LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
    2434. 

  2434. <LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
    2435. 

  2435. <LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_fp_digits
    2436. 

  2436. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    2437. 

  2437. </UL>
    2438. 

  2438. <BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf
    2439. 

  2439. </UL>
    2440. 

  2440. 

  2441. <P><STRONG><a name="[137]"></a>_printf_post_padding</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, printfa.o(i._printf_post_padding), UNUSED)
    2442. 

  2442. <BR><BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    2443. 

  2443. </UL>
    2444. 

  2444. 

  2445. <P><STRONG><a name="[136]"></a>_printf_pre_padding</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, printfa.o(i._printf_pre_padding), UNUSED)
    2446. 

  2446. <BR><BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
    2447. 

  2447. </UL>
    2448. 

  2448. <P>
    2449. 

  2449. <H3>
    2450. 

  2450. Undefined Global Symbols
    2451. 

  2451. </H3><HR></body></html>
    2452.